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* Fix typos. Remove trailing blanks. Fix coding style.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@195151 138bc75d-0d04-0410-961f-82ee72b054a4
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gjl committed Jan 14, 2013
1 parent b5e1d8c commit 0dff955
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Showing 15 changed files with 1,036 additions and 967 deletions.
24 changes: 24 additions & 0 deletions gcc/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,27 @@
2013-01-14 Georg-Johann Lay <[email protected]>

* config/avr/avr-stdint.h: Remove trailing blanks.
* config/avr/avr-log.h: Same.
* config/avr/avr-arch.h: Same.
* config/avr/avr-devices.c: Same.
* config/avr/avr-dimode.md: Same.
* config/avr/predicates.md: Same.
* config/avr/avr-c.c: Same. And fix typo.

* config/avr/avr-protos.h: Same. And:
(function_arg_regno_p): Rename to avr_function_arg_regno_p.
(init_cumulative_args): Rename to avr_init_cumulative_args.
(expand_prologue): Rename to avr_expand_prologue.
(expand_epilogue): Rename to avr_expand_epilogue.
(adjust_insn_length): Rename to avr_adjust_insn_length.
(notice_update_cc): Rename to avr_notice_update_cc.
(final_prescan_insn): Rename to avr_final_prescan_insn.
* config/avr/avr.c: Same.
* config/avr/avr.h: Same.
* config/avr/avr.md: Remove trailing blanks.
(prologue): Use avr_expand_prologue.
(epilogue, sibcall_epilogue): Use avr_expand_epilogue.

2013-01-14 Richard Biener <[email protected]>

* tree-cfg.c (verify_expr_location, verify_expr_location_1,
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22 changes: 11 additions & 11 deletions gcc/config/avr/avr-arch.h
Original file line number Diff line number Diff line change
Expand Up @@ -74,7 +74,7 @@ struct base_arch_s
/* This core has the RAMPD special function register
and thus also the RAMPX, RAMPY and RAMPZ registers. */
int have_rampd;

/* Default start of data section address for architecture. */
int default_data_section_start;

Expand All @@ -84,9 +84,9 @@ struct base_arch_s

/* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
const char *const macro;

/* Architecture name. */
const char *const arch_name;
const char *const arch_name;
};


Expand All @@ -96,16 +96,16 @@ struct mcu_type_s
{
/* Device name. */
const char *const name;

/* Index in avr_arch_types[]. */
enum avr_arch arch;
enum avr_arch arch;

/* Must lie outside user's namespace. NULL == no macro. */
const char *const macro;

/* Stack pointer have 8 bits width. */
int short_sp;

/* Some AVR devices have a core erratum when skipping a 2-word instruction.
Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE.
Problems will occur with return address is IRQ executes during the
Expand All @@ -125,15 +125,15 @@ struct mcu_type_s

/* Core Erratum: Must not skip 2-word instruction. */
int errata_skip;

/* Start of data section. */
int data_section_start;

/* Number of 64k segments in the flash. */
int n_flash;

/* Name of device library. */
const char *const library_name;
const char *const library_name;
};

/* Map architecture to its texinfo string. */
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26 changes: 13 additions & 13 deletions gcc/config/avr/avr-c.c
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ avr_register_target_pragmas (void)
gcc_assert (ADDR_SPACE_GENERIC == ADDR_SPACE_RAM);

/* Register address spaces. The order must be the same as in the respective
enum from avr.h (or designated initialized must be used in avr.c). */
enum from avr.h (or designated initializers must be used in avr.c). */

for (i = 0; i < ADDR_SPACE_COUNT; i++)
{
Expand All @@ -52,22 +52,22 @@ avr_register_target_pragmas (void)
}


/* Transorm LO into uppercase and write the result to UP.
/* Transform LO into uppercase and write the result to UP.
You must provide enough space for UP. Return UP. */

static char*
avr_toupper (char *up, const char *lo)
{
char *up0 = up;

for (; *lo; lo++, up++)
*up = TOUPPER (*lo);

*up = '\0';

return up0;
}

/* Worker function for TARGET_CPU_CPP_BUILTINS. */

static const char *const avr_builtin_name[] =
Expand All @@ -82,7 +82,7 @@ void
avr_cpu_cpp_builtins (struct cpp_reader *pfile)
{
int i;

builtin_define_std ("AVR");

if (avr_current_arch->macro)
Expand Down Expand Up @@ -139,24 +139,24 @@ avr_cpu_cpp_builtins (struct cpp_reader *pfile)
if (avr_current_device->errata_skip)
{
cpp_define (pfile, "__AVR_ERRATA_SKIP__");

if (avr_current_arch->have_jmp_call)
cpp_define (pfile, "__AVR_ERRATA_SKIP_JMP_CALL__");
}

cpp_define_formatted (pfile, "__AVR_SFR_OFFSET__=0x%x",
avr_current_arch->sfr_offset);

#ifdef WITH_AVRLIBC
cpp_define (pfile, "__WITH_AVRLIBC__");
#endif /* WITH_AVRLIBC */
/* Define builtin macros so that the user can easily query if or if not
non-generic address spaces (and which) are supported.

/* Define builtin macros so that the user can easily query whether
non-generic address spaces (and which) are supported or not.
This is only supported for C. For C++, a language extension is needed
(as mentioned in ISO/IEC DTR 18037; Annex F.2) which is not
implemented in GCC up to now. */

if (!strcmp (lang_hooks.name, "GNU C"))
{
for (i = 0; i < ADDR_SPACE_COUNT; i++)
Expand All @@ -174,8 +174,8 @@ avr_cpu_cpp_builtins (struct cpp_reader *pfile)
}
}

/* Define builtin macros so that the user can easily query if or
if not a specific builtin is available. */
/* Define builtin macros so that the user can easily query whether or
not a specific builtin is available. */

for (i = 0; avr_builtin_name[i]; i++)
{
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2 changes: 1 addition & 1 deletion gcc/config/avr/avr-devices.c
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ avr_arch_types[] =
/*
A M J LM E E E X R d S S O A
S U M PO L L I M A a t F ff r
M L P MV P P J E M t a R s c
M L P MV P P J E M t a R s c
XW M M M G P a r e h
X P A D t t ID */
{ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, "1", "avr1" },
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6 changes: 3 additions & 3 deletions gcc/config/avr/avr-dimode.md
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
;; The DImode insns are all straight forward -- except movdi. The approach
;; of this implementation is to provide DImode insns without the burden of
;; introducing movdi.
;;
;;
;; The caveat is that if there are insns for some mode, there must also be a
;; respective move insn that describes reloads. Therefore, this
;; implementation uses an accumulator-based model with two hard-coded,
Expand Down Expand Up @@ -75,7 +75,7 @@
{
emit_move_insn (gen_rtx_REG (QImode, REG_X), operands[2]);
emit_insn (gen_adddi3_const8_insn ());
}
}
else if (const_operand (operands[2], GET_MODE (operands[2])))
{
emit_insn (gen_add<mode>3_const_insn (operands[2]));
Expand Down Expand Up @@ -344,7 +344,7 @@
{
emit_move_insn (gen_rtx_REG (QImode, REG_X), operands[2]);
emit_insn (gen_compare_const8_di2 ());
}
}
else if (const_operand (operands[2], GET_MODE (operands[2])))
{
emit_insn (gen_compare_const_<mode>2 (operands[2]));
Expand Down
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