Skip to content

Commit

Permalink
refactor: enhancing IR dumping to file/stream to help with IR generat…
Browse files Browse the repository at this point in the history
…ion tests
  • Loading branch information
SuperFola committed Nov 1, 2024
1 parent a93e006 commit 278a4ce
Show file tree
Hide file tree
Showing 4 changed files with 61 additions and 42 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,13 @@ namespace Ark::internal
*/
void process(const std::vector<IR::Block>& pages, const std::vector<std::string>& symbols, const std::vector<ValTableElem>& values);

/**
* @brief Dump the IR given to `process` to an output stream
*
* @param stream output stream
*/
void dumpToStream(std::ostream& stream) const;

/**
* @brief Return the constructed bytecode object
*
Expand Down
1 change: 1 addition & 0 deletions include/Ark/Compiler/Welder.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -80,6 +80,7 @@ namespace Ark
bool saveBytecodeToFile(const std::string& filename);

[[nodiscard]] const internal::Node& ast() const noexcept;
[[nodiscard]] std::string textualIR() const noexcept;
[[nodiscard]] const bytecode_t& bytecode() const noexcept;

private:
Expand Down
42 changes: 42 additions & 0 deletions src/arkreactor/Compiler/IntermediateRepresentation/IRCompiler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
#include <utility>
#include <unordered_map>
#include <picosha2.h>
#include <fmt/ostream.h>

#include <Ark/Constants.hpp>
#include <Ark/Literals.hpp>
Expand Down Expand Up @@ -48,6 +49,47 @@ namespace Ark::internal
m_logger.traceEnd();
}

void IRCompiler::dumpToStream(std::ostream& stream) const
{
std::size_t index = 0;
for (const auto& block : m_ir)
{
fmt::println(stream, "page_{}", index);
for (const auto entity : block)
{
switch (entity.kind())
{
case IR::Kind::Label:
fmt::println(stream, ".L{}:", entity.label());
break;

case IR::Kind::Goto:
fmt::println(stream, "\tGOTO L{}", entity.label());
break;

case IR::Kind::GotoIfTrue:
fmt::println(stream, "\tGOTO_IF_TRUE L{}", entity.label());
break;

case IR::Kind::GotoIfFalse:
fmt::println(stream, "\tGOTO_IF_FALSE L{}", entity.label());
break;

case IR::Kind::Opcode:
fmt::println(stream, "\t{} {}", InstructionNames[entity.inst()], entity.primaryArg());
break;

case IR::Kind::Opcode2Args:
fmt::println(stream, "\t{} {}, {}", InstructionNames[entity.inst()], entity.primaryArg(), entity.secondaryArg());
break;
}
}

fmt::println(stream, "");
++index;
}
}

const bytecode_t& IRCompiler::bytecode() const noexcept
{
return m_bytecode;
Expand Down
53 changes: 11 additions & 42 deletions src/arkreactor/Compiler/Welder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -59,12 +59,12 @@ namespace Ark
m_ir = m_ir_optimizer.intermediateRepresentation();
}

if ((m_features & FeatureDumpIR) != 0)
dumpIRToFile();

m_ir_compiler.process(m_ir, m_compiler.symbols(), m_compiler.values());
m_bytecode = m_ir_compiler.bytecode();

if ((m_features & FeatureDumpIR) != 0)
dumpIRToFile();

return true;
}
catch (const CodeError& e)
Expand Down Expand Up @@ -97,6 +97,13 @@ namespace Ark
return m_computed_ast;
}

std::string Welder::textualIR() const noexcept
{
std::stringstream stream;
m_ir_compiler.dumpToStream(stream);
return stream.str();
}

const bytecode_t& Welder::bytecode() const noexcept
{
return m_bytecode;
Expand All @@ -111,45 +118,7 @@ namespace Ark
path.replace_extension(".ark.ir");

std::ofstream output(path);

std::size_t index = 0;
for (const auto& block : m_ir)
{
fmt::println(output, "page_{}", index);
for (const auto entity : block)
{
switch (entity.kind())
{
case internal::IR::Kind::Label:
fmt::println(output, ".L{}:", entity.label());
break;

case internal::IR::Kind::Goto:
fmt::println(output, "\tGOTO L{}", entity.label());
break;

case internal::IR::Kind::GotoIfTrue:
fmt::println(output, "\tGOTO_IF_TRUE L{}", entity.label());
break;

case internal::IR::Kind::GotoIfFalse:
fmt::println(output, "\tGOTO_IF_FALSE L{}", entity.label());
break;

case internal::IR::Kind::Opcode:
fmt::println(output, "\t{} {}", internal::InstructionNames[entity.inst()], entity.primaryArg());
break;

case internal::IR::Kind::Opcode2Args:
fmt::println(output, "\t{} {}, {}", internal::InstructionNames[entity.inst()], entity.primaryArg(), entity.secondaryArg());
break;
}
}

fmt::println(output, "");
++index;
}

m_ir_compiler.dumpToStream(output);
output.close();
}

Expand Down

0 comments on commit 278a4ce

Please sign in to comment.