Fix initialisation of MTCC register. #17
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The ISA doc says that MTCC should be initialised to the executable root. This makes sense as it needs to be executable to be used as the trap vector. Sail was erroneously setting it to the memory RW root, so fix it here. cheriot-rtos never actually uses this initial value: instead it writes MTCC with a PCC derived capability, hence why this was not noticed before. Spotted by @kliuMsft .
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The ISA doc says that MTCC should be initialised to the executable root. This makes sense as it needs to be executable to be used as the trap vector. Sail was erroneously setting it to the memory RW root, so fix it here. cheriot-rtos never actually uses this initial value: instead it writes MTCC with a PCC derived capability, hence why this was not noticed before. Spotted by @kliuMsft .