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[uvmgen] add syoscb init
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Dragon-Git committed Jan 21, 2024
1 parent 0d8900a commit 6249f90
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9 changes: 6 additions & 3 deletions README.md
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Expand Up @@ -10,7 +10,7 @@
---
## Introduction

uvmgen is a command-line interface (CLI) program for generating testbench structures based on a provided JSON configuration file.
uvmgen is a command-line interface (CLI) program for generating testbench structures based on a provided JSON/YAML/TOML/XML configuration file.

## Installing
<details>
Expand All @@ -37,7 +37,7 @@ uvmgen --input <input_json_file> --output <output_directory>

### Options

- `--input <input_json_file>`: Specifies the input JSON file containing the configuration for the testbench structure.
- `--input <input_cfg_file>`: Specifies the input configuration file containing the configuration for the testbench structure.
- `--output <output_directory>`: Specifies the directory where the generated files will be placed.

### Help
Expand All @@ -48,6 +48,9 @@ For additional help and options, you can use the -h or --help option:
uvmgen -h
```

### SyoSil ApS UVM Scoreboard
The [SyoSil ApS UVM Scoreboard](https://github.com/Dragon-Git/uvm_syoscb) is a feature of uvmgen that allows you to integrate SyoSil ApS UVM Scoreboard in environments. To use this feature, you need to add `pk_syoscb` to `import_pkgs` of env_pkg, and set the `SYOSCB_HOME` environment variables to SyoSil ApS UVM Scoreboard installed directory. The bash command is printed after uvmgen is successful, and the other shells can be replaced with the corresponding commands.

## Example

Suppose you have a JSON configuration file named testbench_config.json and you want to generate the testbench structure in a directory named tb, you would run the following command:
Expand All @@ -60,7 +63,7 @@ uvmgen -i testbench_config.json -o tb
uvmgen -i testbench_config.json
```

You can use `test/json/example/typical.json` to generate a complete UVM environment, or use `test/json/base_pkg/***.json` to generate a single package.
You can use `test/json/example/typical.json` to generate a complete UVM environment, or use `test/json/base_pkg/***.***` to generate a single package.

## Contribute
Contributions are always welcome! Simple fork this repo and submit a pull request.
2 changes: 2 additions & 0 deletions src/uvmgen/templates/agt_pkg/mon.mako.sv
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Expand Up @@ -140,6 +140,8 @@ task ${agent_name}_mon::tx_monitor();
// ToDo: User need to add monitoring logic and remove #10
`uvm_info("TX_MONITOR"," User need to add monitoring logic ",UVM_LOW)
#10; // For test to avoid zero-delay-loop
tr = ${agent_name}_item::type_id::create("tr");
tr.status = ${agent_name}_item::IS_OK; // For test
`uvm_do_callbacks(${agent_name}_mon,${agent_name}_mon_callbacks, pre_ack(this, tr))
// ToDo: React to observed transaction with ACK/NAK
`uvm_info("TX_MONITOR", "Completed transaction...",UVM_HIGH)
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32 changes: 32 additions & 0 deletions src/uvmgen/templates/env_pkg/env.mako.sv
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Expand Up @@ -6,7 +6,12 @@ typedef class ${env_name}_cfg;
// typedef class {reg_name};
class ${env_name} extends uvm_env;
${env_name}_cfg cfg;
% if "pk_syoscb" in import_pkgs:
cl_syoscb scb;
pk_utils_uvm::filter_trfm #(${scb_item}, uvm_sequence_item) ft;
% else:
${scb_name} scb;
% endif
% if has_regmodel:
${ral_block_name} regmodel;
${env_childs[reg_agt_name].replace("_agt", "")}_reg_adapter ${reg_agt_name}_reg_adapter;
Expand Down Expand Up @@ -51,8 +56,17 @@ function void ${env_name}::build_phase(uvm_phase phase);
//ToDo: Instantiate other components,callbacks and TLM ports if added by user

// create components

% if "pk_syoscb" in import_pkgs:
// Pass the scoreboard configuration object to the config_db
uvm_config_db #(cl_syoscb_cfg)::set(this, "scb", "cfg", cfg.syoscb_cfg);
// Create the scoreboard
scb = cl_syoscb::type_id::create("scb", this);
ft = pk_utils_uvm::filter_trfm #(${scb_item}, uvm_sequence_item)::type_id::create("ft", this);
% else:
scb = ${scb_name}::type_id::create("scb",this);
scb.cfg = cfg;
% endif

% if has_regmodel:
regmodel = ${ral_block_name}::type_id::create("regmodel",this);
Expand All @@ -64,7 +78,25 @@ function void ${env_name}::build_phase(uvm_phase phase);
endfunction: build_phase

function void ${env_name}::connect_phase(uvm_phase phase);
% if "pk_syoscb" in import_pkgs:
cl_syoscb_subscriber subscriber;
% endif

super.connect_phase(phase);
% if "pk_syoscb" in import_pkgs:
% for child_name in env_childs:
// Get the subscriber for Producer: P1 for queue: Q1 and connect it
// to the UVM monitor producing transactions for this queue
this.${child_name}.mon.mon_analysis_port.connect(ft.analysis_export);
subscriber = this.scb.get_subscriber("Q1", "P1");
ft.ap.connect(subscriber.analysis_export);
// Get the subscriber for Producer: P1 for queue: Q2 and connect it
// to the UVM monitor producing transactions for this queue
this.${child_name}.mon.mon_analysis_port.connect(ft.analysis_export);
subscriber = this.scb.get_subscriber("Q2", "P1");
ft.ap.connect(subscriber.analysis_export);
% endfor
% endif

% if has_regmodel:
regmodel.default_map.set_sequencer(${reg_agt_name}.sqr,${reg_agt_name}_reg_adapter);
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16 changes: 16 additions & 0 deletions src/uvmgen/templates/env_pkg/env_cfg.mako.sv
Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,13 @@ class ${env_name}_cfg extends uvm_object;

// bit to configure all uvcs with zero delays to create high bw test
rand bit zero_delays;
// sub-configure object
% for child_name, child_type in env_childs.items():
${child_type[:-3]}cfg ${child_name[:-3]}cfg;
% endfor
% if "pk_syoscb" in import_pkgs:
cl_syoscb_cfg syoscb_cfg;
% endif

// set zero_delays 40% of the time
constraint zero_delays_c {
Expand Down Expand Up @@ -53,6 +57,18 @@ class ${env_name}_cfg extends uvm_object;
% for child_name, child_type in env_childs.items():
${child_name[:-3]}cfg = ${child_type[:-3]}cfg::type_id::create("${child_name[:-3]}cfg");
% endfor
% if "pk_syoscb" in import_pkgs:
// Create the scoreboard configuration object
this.syoscb_cfg = cl_syoscb_cfg::type_id::create("syoscb_cfg");
// Use the MD5 queue implementation as scoreboard queue
this.syoscb_cfg.set_queue_type(pk_syoscb::SYOSCB_QUEUE_STD);
// Set the compare strategy to be OOO
this.syoscb_cfg.set_compare_type(pk_syoscb::SYOSCB_COMPARE_IO);
// Configure the scoreboard
this.syoscb_cfg.set_queues({"Q1", "Q2"});
void'(this.syoscb_cfg.set_primary_queue("Q1"));
void'(this.syoscb_cfg.set_producer("P1", {"Q1", "Q2"}));
% endif
// build the ral model
create_ral_models(csr_base_addr);

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7 changes: 6 additions & 1 deletion src/uvmgen/templates/tb_lib/filelist.f
Original file line number Diff line number Diff line change
Expand Up @@ -2,10 +2,15 @@
% if "agt" in pkg:
$TB_DIR/${pkg}/${pkg.replace("agt_pkg", "if")}.gen.sv
% endif
% if "pk_syoscb" in pkg:
+incdir+$SYOSCB_DIR/uvm_syoscb/src
$SYOSCB_HOME/uvm_syoscb/lib/pk_utils_uvm.sv
$SYOSCB_HOME/uvm_syoscb/src/${pkg}.sv
% elif "tb" not in pkg:
+incdir+$TB_DIR/${pkg}
% if "tb" not in pkg:
$TB_DIR/${pkg}/${pkg}.gen.sv
% else:
+incdir+$TB_DIR/${pkg}
$TB_DIR/${pkg}/tb.gen.sv
% endif
% endfor
2 changes: 2 additions & 0 deletions src/uvmgen/uvmgen.py
Original file line number Diff line number Diff line change
Expand Up @@ -87,6 +87,8 @@ def gen(self, input: str, output: str = "tb"):
for tpl in pkg_tpls:
output_name = self.get_output_name(tpl, k, v["type"])
self.serve_template(tpl.name, output_name, v)
print("Success! If pk_syoscb pkg is used, set the following environment variables:\n")
print(f"export SYOSCB_HOME={Path(__file__).parent/'uvm_syoscb'}")


def main():
Expand Down
4 changes: 2 additions & 2 deletions test/json/example/typical.json
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@
"type": "env_pkg",
"vars": {
"pkg_name": "typical_env_pkg",
"import_pkgs":["spi_agt_pkg", "ral_pkg"],
"import_pkgs":["pk_syoscb", "spi_agt_pkg", "ral_pkg"],
"env_name": "typical_env",
"env_childs": {"m_spi_agt": "spi_agt"},
"scb_name": "typical_scb",
Expand Down Expand Up @@ -66,7 +66,7 @@
"pkg_name": "typical_tb_lib",
"import_pkgs":["typical_test_pkg"],
"if_name": "spi_if",
"filelist_pkgs":["spi_agt_pkg", "typical_ral_pkg", "typical_env_pkg", "typical_seq_lib_pkg", "typical_test_pkg", "typical_tb_lib"]
"filelist_pkgs":["spi_agt_pkg", "typical_ral_pkg", "pk_syoscb", "typical_env_pkg", "typical_seq_lib_pkg", "typical_test_pkg", "typical_tb_lib"]

}
}
Expand Down

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