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[uvmgen] add ral in env
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Dragon-Git committed Nov 25, 2023
1 parent 4aa798b commit 9bf742b
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Showing 3 changed files with 41 additions and 10 deletions.
17 changes: 8 additions & 9 deletions src/uvmgen/templates/env_pkg/env.mako.sv
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,7 @@ class ${env_name} extends uvm_env;
${scb_name} scb;
% if has_regmodel:
${ral_block_name} regmodel;
reg_seq ral_sequence;
${}_reg_adapter m_${}_reg_adapter;
${env_childs[reg_agt_name].replace("_agt", "")}_reg_adapter ${reg_agt_name}_reg_adapter;
% endif
${vsqr_name} vsqr;
// Declear agent
Expand Down Expand Up @@ -50,20 +49,20 @@ function void ${env_name}::build_phase(uvm_phase phase);
% if has_regmodel:
regmodel = ${ral_block_name}::type_id::create("regmodel",this);
regmodel.build();
ral_sequence = reg_seq::type_id::create("ral_sequence");
ral_sequence.model = regmodel;
reg2host = new("reg2host");
// ral_sequence = reg_seq::type_id::create("ral_sequence");
// ral_sequence.model = regmodel;
${reg_agt_name}_reg_adapter = new("${reg_agt_name}_reg_adapter");
% endif
endfunction: build_phase

function void ${env_name}::connect_phase(uvm_phase phase);
super.connect_phase(phase);

% if has_regmodel:
regmodel.default_map.set_sequencer(mast_seqr,reg2host);
MULT_DRV_START
regmodel.default_map.set_sequencer(mast_seqr_0,reg2host);
MULT_DRV_END
regmodel.default_map.set_sequencer(${reg_agt_name}.sqr,${reg_agt_name}_reg_adapter);
// MULT_DRV_START
// regmodel.default_map.set_sequencer(mast_seqr_0,m_${reg_agt_name}_reg_adapter);
// MULT_DRV_END
% endif
% for child_name, child_type in env_childs.items():
$cast(vsqr.${child_name[:-3]}sqr, ${child_name}.sqr);
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29 changes: 29 additions & 0 deletions src/uvmgen/templates/ral_pkg/ral_pkg.mako.sv
Original file line number Diff line number Diff line change
Expand Up @@ -4,13 +4,42 @@ package ral_pkg;
`include "uvm_macros.svh"
import uvm_pkg::*;

class ctrl extends uvm_reg;
`uvm_object_utils(ctrl)
rand uvm_reg_field ctrl_field;

function new(string name = "ctrl");
super.new(name, 32, UVM_NO_COVERAGE);
endfunction

virtual function void build();
ctrl_field = uvm_reg_field::type_id::create("ctrl_field");
ctrl_field.configure(this, 32, 0, "RW", 0, 0, 1, 0, 0);
endfunction
endclass

class empty_reg_block extends uvm_reg_block;

`uvm_object_utils(empty_reg_block)
rand ctrl ctrl_reg;

uvm_reg_map APB_map; // Block map
function new(string name = "empty_reg_block");
super.new(name);
endfunction

//--------------------------------------------------------------------
// build
//--------------------------------------------------------------------
virtual function void build();
ctrl_reg = ctrl::type_id::create("ctrl");
ctrl_reg.configure(this, null, "");
ctrl_reg.build();
// Map name, Offset, Number of bytes, Endianess)
APB_map = create_map("APB_map", 'h0, 4, UVM_LITTLE_ENDIAN);
APB_map.add_reg(ctrl_reg, 32'h00000000, "RW");
lock_model();
endfunction
endclass

endpackage
5 changes: 4 additions & 1 deletion test/json/env.json
Original file line number Diff line number Diff line change
Expand Up @@ -4,14 +4,17 @@
"type": "env_pkg",
"vars": {
"pkg_name": "spi_env_pkg",
"import_pkgs":["spi_agt_pkg"],
"import_pkgs":["spi_agt_pkg", "ral_pkg"],
"env_name": "spi_env",
"env_childs": {"m_spi_agt": "spi_agt"},
"scb_name": "spi_scb",
"vsqr_name": "spi_vsqr",
"mst_action": "spi_item",
"slv_action": "spi_item",
"scb_item": "spi_item",
"has_regmodel": "True",
"ral_block_name": "empty_reg_block",
"reg_agt_name": "m_spi_agt",
"mon2cov_con_approach": "analysis_port"
}
}
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