Merge pull request #72 from Freax13/feature/intel-compat

intel compat
Freax13 · Sep 22, 2024 · 737d068 · 737d068
2 parents 4fad16f + 8289bba
commit 737d068
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Showing 3 changed files with 40 additions and 12 deletions.
diff --git a/host/mushroom/src/insecure.rs b/host/mushroom/src/insecure.rs
@@ -219,8 +219,7 @@ fn run_kernel_vcpu(id: u8, vm: Arc<VmHandle>, cpuid_entries: Arc<[KvmCpuidEntry2
         sregs.efer = EferFlags::SYSTEM_CALL_EXTENSIONS.bits()
             | EferFlags::LONG_MODE_ENABLE.bits()
             | EferFlags::LONG_MODE_ACTIVE.bits()
-            | EferFlags::NO_EXECUTE_ENABLE.bits()
-            | EferFlags::SECURE_VIRTUAL_MACHINE_ENABLE.bits();
+            | EferFlags::NO_EXECUTE_ENABLE.bits();
         sregs.cr4 = Cr4Flags::PHYSICAL_ADDRESS_EXTENSION.bits()
             | Cr4Flags::PAGE_GLOBAL.bits()
             | Cr4Flags::OSFXSR.bits()

diff --git a/host/mushroom/src/kvm.rs b/host/mushroom/src/kvm.rs
@@ -1051,7 +1051,7 @@ impl KvmSegment {
         db: 0,
         s: 1,
         l: 1,
-        g: 0,
+        g: 1,
         avl: 0,
         unusable: 0,
         _padding: 0,

diff --git a/tee/kernel/src/memory/invlpgb.rs b/tee/kernel/src/memory/invlpgb.rs
@@ -1,4 +1,8 @@
-use core::{arch::asm, iter::Step, ops::RangeInclusive};
+use core::{
+    arch::{asm, x86_64::__cpuid},
+    iter::Step,
+    ops::RangeInclusive,
+};
 
 use bit_field::BitField;
 use bitflags::bitflags;
@@ -88,6 +92,20 @@ impl InvlpgbCompat {
     }
 }
 
+enum Hypercall {
+    Vmmcall,
+    Vmcall,
+}
+
+static HYPERCALL: Lazy<Hypercall> = Lazy::new(|| {
+    let svm = unsafe { __cpuid(0x8000_0001) }.ecx.get_bit(2);
+    if svm {
+        Hypercall::Vmmcall
+    } else {
+        Hypercall::Vmcall
+    }
+});
+
 fn hv_flush_all() {
     const HV_X64_MSR_GUEST_OS_ID: u32 = 0x40000000;
     unsafe {
@@ -103,14 +121,25 @@ fn hv_flush_all() {
 
     let result: u64;
 
-    unsafe {
-        asm! {
-            "vpxor xmm0, xmm0, xmm0",
-            "vmmcall",
-            in("rcx") hypercall_input,
-            in("rdx") flags.bits(),
-            inout("rax") 0x5a5a5a5a5a5a5a5au64 => result,
-        };
+    match *HYPERCALL {
+        Hypercall::Vmmcall => unsafe {
+            asm! {
+                "vpxor xmm0, xmm0, xmm0",
+                "vmmcall",
+                in("rcx") hypercall_input,
+                in("rdx") flags.bits(),
+                inout("rax") 0x5a5a5a5a5a5a5a5au64 => result,
+            };
+        },
+        Hypercall::Vmcall => unsafe {
+            asm! {
+                "vpxor xmm0, xmm0, xmm0",
+                "vmcall",
+                in("rcx") hypercall_input,
+                in("rdx") flags.bits(),
+                inout("rax") 0x5a5a5a5a5a5a5a5au64 => result,
+            };
+        },
     }
 
     assert_eq!(result.get_bits(0..=15), 0);