Frequency of the clock is divided by required number with required duty cycle. EDA tool is used to create the verilog code and simlulation.The picture of the waveform is attached to the code file please check.
-
Notifications
You must be signed in to change notification settings - Fork 2
Frequency of the clock is divided by required number with required duty cycle. EDA tool is used to create the verilog code and simulation.The picture of the waveform is attached to the code file please check.
NitinBnittu/Frequency-divider
Folders and files
| Name | Name | Last commit message | Last commit date | |
|---|---|---|---|---|
Repository files navigation
About
Frequency of the clock is divided by required number with required duty cycle. EDA tool is used to create the verilog code and simulation.The picture of the waveform is attached to the code file please check.
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published