VUs: Mask start addresses

Fixes the crash in Red Faction 2 when using the VU0 JIT
PCSX2 · Jul 9, 2021 · 93e5f86 · 93e5f86
1 parent 2195ac9
commit 93e5f86
Show file tree

Hide file tree

Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/pcsx2/VU0micro.cpp b/pcsx2/VU0micro.cpp
@@ -47,7 +47,7 @@ void __fastcall vu0ExecMicro(u32 addr) {
 	VU0.VI[REG_VPU_STAT].UL &= ~0xFF;
 	VU0.VI[REG_VPU_STAT].UL |=  0x01;
 	VU0.cycle = cpuRegs.cycle;
-	if ((s32)addr != -1) VU0.VI[REG_TPC].UL = addr;
+	if ((s32)addr != -1) VU0.VI[REG_TPC].UL = addr & 0x1FF;
 
 	CpuVU0->SetStartPC(VU0.VI[REG_TPC].UL << 3);
 	_vuExecMicroDebug(VU0);

diff --git a/pcsx2/VU1micro.cpp b/pcsx2/VU1micro.cpp
@@ -69,7 +69,7 @@ void __fastcall vu1ExecMicro(u32 addr)
 		if(VU0.VI[REG_FBRST].UL & 0x800)
 			VU0.VI[REG_VPU_STAT].UL |= 0x0100;
 
-		vu1Thread.ExecuteVU(addr, vif1Regs.top, vif1Regs.itop);
+		vu1Thread.ExecuteVU(addr & 0x7FF, vif1Regs.top, vif1Regs.itop);
 		return;
 	}
 	static int count = 0;
@@ -79,7 +79,7 @@ void __fastcall vu1ExecMicro(u32 addr)
 	VU1.cycle = cpuRegs.cycle;
 	VU0.VI[REG_VPU_STAT].UL &= ~0xFF00;
 	VU0.VI[REG_VPU_STAT].UL |=  0x0100;
-	if ((s32)addr != -1) VU1.VI[REG_TPC].UL = addr;
+	if ((s32)addr != -1) VU1.VI[REG_TPC].UL = addr & 0x7FF;
 
 	CpuVU1->SetStartPC(VU1.VI[REG_TPC].UL << 3);
 	_vuExecMicroDebug(VU1);