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Ensure the non-semantic instructions and undefs are properly ignored (#…
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…139)

* Ensure the non-semantic instructions and undefs are properly ignroed

* Update change log

* Added the shader as test case
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PENGUINLIONG authored Apr 8, 2024
1 parent 5001b0d commit 19b40e7
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4 changes: 4 additions & 0 deletions CHANGELOG.md
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@@ -1,5 +1,9 @@
# Change Log

## v1.2.1

- Fixed compatibility with non-semantics extension instructions. (#138)

## v1.2.0

- Separated `spirq-` family of subcrates to [`spq`](https://github.com/PENGUINLIONG/spq-rs)
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Binary file added assets/issue138.frag.spv
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57 changes: 57 additions & 0 deletions assets/issue138.json
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@@ -0,0 +1,57 @@
{
"EntryPoint": "main",
"ExecutionModel": "Fragment",
"ExecutionModes": [
{
"ExecutionMode": "OriginUpperLeft",
"Operands": []
}
],
"Variables": {
"Inputs": [
{
"Name": "v_position",
"Location": 0,
"Component": 0,
"Type": "vec2<f32>"
}
],
"Outputs": [
{
"Name": "outDepth",
"Location": 0,
"Component": 0,
"Type": "vec4<f32>"
}
],
"Descriptors": [
{
"Name": "u_depthBufferTex",
"Set": 0,
"Binding": 1,
"DescriptorType": "CombinedImageSampler",
"Type": "CombinedImageSampler<SampledImage2D<f32,Color>>",
"Count": 1
},
{
"Name": null,
"Set": 0,
"Binding": 0,
"DescriptorType": "UniformBuffer",
"Type": {
"Kind": "Struct",
"Members": [
{
"Name": "u_stuff",
"Offset": 0,
"MemberType": "vec4<f32>"
}
]
},
"Count": 1
}
],
"PushConstants": [],
"SpecConstants": []
}
}
2 changes: 1 addition & 1 deletion spirq/examples/inspect/main.log
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@@ -1,4 +1,4 @@
collected spirvs: ["gallery.frag", "mesh-shader", "moon", "spirv-spec.frag"]
collected spirvs: ["gallery.frag", "mesh-shader", "moon", "my_shader.frag", "spirv-spec.frag"]
entered function main
found a store instruction
found a load instruction
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2 changes: 1 addition & 1 deletion spirq/examples/walk/main.log
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@@ -1,4 +1,4 @@
collected spirvs: ["gallery.frag", "mesh-shader", "moon", "spirv-spec.frag"]
collected spirvs: ["gallery.frag", "mesh-shader", "moon", "my_shader.frag", "spirv-spec.frag"]
[main { exec_model: Fragment, name: "main", vars: [Descriptor { name: None, desc_bind: (set=0, bind=0), desc_ty: UniformBuffer, ty: Struct(StructType { name: Some("blockName"), members: [StructMember { name: Some("s"), offset: Some(0), ty: Struct(StructType { name: Some("S"), members: [StructMember { name: Some("b"), offset: Some(0), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }, StructMember { name: Some("v"), offset: Some(16), ty: Array(ArrayType { element_ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }), nelement: Some(5), stride: Some(16) }), access_ty: ReadWrite }, StructMember { name: Some("i"), offset: Some(96), ty: Scalar(Integer { bits: 32, is_signed: true }), access_ty: ReadWrite }] }), access_ty: ReadWrite }, StructMember { name: Some("cond"), offset: Some(112), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }] }), nbind: 1 }, Output { name: Some("color"), location: (loc=0, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("color1"), location: (loc=0, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("color2"), location: (loc=2, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("multiplier"), location: (loc=1, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }], exec_modes: [ExecutionMode { exec_mode: OriginUpperLeft, operands: [] }] }]
Descriptor { name: None, desc_bind: (set=0, bind=0), desc_ty: UniformBuffer, ty: Struct(StructType { name: Some("blockName"), members: [StructMember { name: Some("s"), offset: Some(0), ty: Struct(StructType { name: Some("S"), members: [StructMember { name: Some("b"), offset: Some(0), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }, StructMember { name: Some("v"), offset: Some(16), ty: Array(ArrayType { element_ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }), nelement: Some(5), stride: Some(16) }), access_ty: ReadWrite }, StructMember { name: Some("i"), offset: Some(96), ty: Scalar(Integer { bits: 32, is_signed: true }), access_ty: ReadWrite }] }), access_ty: ReadWrite }, StructMember { name: Some("cond"), offset: Some(112), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }] }), nbind: 1 }
- MemberVariableRouting { sym: [s, b], offset: 0, ty: Scalar(Integer { bits: 32, is_signed: false }) }
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2 changes: 1 addition & 1 deletion spirq/src/reflect.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1023,7 +1023,7 @@ impl<'a> ReflectIntermediate<'a> {
// b. Non-semantic instructions with OpExtInst.
while let Some(instr) = instrs.peek() {
let opcode = instr.op();
if let Op::Line | Op::NoLine = opcode {
if let Op::Line | Op::NoLine | Op::ExtInst | Op::Undef = opcode {
instrs.next()?;
continue;
}
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