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update ci

update ci #43

Workflow file for this run

##
## Copyright (c) 2022 TUM Department of Electrical and Computer Engineering.
##
## Licensed under the Apache License, Version 2.0 (the "License");
## you may not use this file except in compliance with the License.
## You may obtain a copy of the License at
##
## http://www.apache.org/licenses/LICENSE-2.0
##
## Unless required by applicable law or agreed to in writing, software
## distributed under the License is distributed on an "AS IS" BASIS,
## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
## See the License for the specific language governing permissions and
## limitations under the License.
##
# GitHub CI build pipeline
name: Run ETISS RISC-V Tests
on:
push:
branches:
- main
workflow_dispatch:
jobs:
test:
runs-on: ubuntu-latest
strategy:
matrix:
python-version: ["3.8"]
xlen: [32, 64]
# xlen: [32]
# virt: ["p", "v"]
virt: ["p"]
exts: ["IMACFD"]
# jit: ["tcc", "gcc", "llvm"]
jit: ["tcc"]
# etiss-arch: ["RV32IMACFD", "RV64IMACFD"]
steps:
- name: Clone wrapper repo
uses: actions/checkout@v3
with:
submodules: recursive
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: Initialize Virtualenv
run: |
python -m pip install --upgrade pip virtualenv
python -m venv .venv
pip install --upgrade pip setuptools wheel
pip install -r requirements.txt
- name: Get riscv-gcc
# TODO: custom build + rvv + clang as alternative?
run: |
# sudo apt install -y gcc-riscv64-unknown-elf
cd /tmp/
wget -q https://static.dev.sifive.com/dev-tools/freedom-tools/v2020.12/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz
mkdir -p /opt/riscv/
tar xvf riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz --strip-components=1 -C /opt/riscv
echo "/opt/riscv/bin/" >> $GITHUB_PATH
cd -
- name: Setup M2-ISA-R
run: |
source .venv/bin/activate
cd M2-ISA-R
pip install -e .
- name: Run M2-ISA-R
run: |
source .venv/bin/activate
python -m m2isar.frontends.coredsl2.parser etiss_arch_riscv/top.core_desc
python -m m2isar.backends.etiss.writer etiss_arch_riscv/gen_model/top.m2isarmodel --static-scalars --separate
# coredsl2_parser etiss_arch_riscv/top.core_desc
# etiss_writer etiss_arch_riscv/gen_model/top.m2isarmodel --static-scalars --separate
cp -r etiss_arch_riscv/gen_output/top/* etiss/ArchImpl/
grep -qF -- "ADD_SUBDIRECTORY(RV${{ matrix.xlen }}${{ matrix.exts }})" etiss/ArchImpl/CMakeLists.txt || echo "ADD_SUBDIRECTORY(RV${{ matrix.xlen }}${{ matrix.exts }})" >> etiss/ArchImpl/CMakeLists.txt
- name: Setup ETISS
run: |
cd etiss
sudo apt install -y g++ libboost-system-dev libboost-filesystem-dev libboost-program-options-dev graphviz doxygen libtinfo-dev zlib1g-dev texinfo
mkdir build
cmake -DCMAKE_BUILD_TYPE=Debug -B build/
cmake --build build/ -j `nproc`
- name: Setup riscv-tests
run: |
cd riscv-tests
autoconf
./configure
make RISCV_PREFIX=riscv64-unknown-elf- XLEN=${{ matrix.xlen }} isa -j `nproc`
- name: Setup etiss_riscv_tests
run: |
sudo apt install -y gdb
source .venv/bin/activate
cd etiss_riscv_tests
pip install -r requirements.txt
- name: Setup etiss_riscv_tests
id: string
uses: ASzc/change-string-case-action@v5
with:
string: ${{ matrix.exts }}
- name: Run etiss_riscv_tests
continue-on-error: true
run: |
source .venv/bin/activate
# etiss_riscv_tests/test.py --arch RV${{ matrix.xlen }}-${{ matrix.exts }} --bits ${{ matrix.xlen }} --ext ${{ steps.string.outputs.lowercase }} --virt p v --timeout 10 --jit ${{ matrix.jit }} riscv-tests/isa etiss/build/bin/bare_etiss_processor
# python etiss_riscv_tests/test.py --arch RV${{ matrix.xlen }}${{ matrix.exts }} --bits ${{ matrix.xlen }} --ext ${{ steps.string.outputs.lowercase }} --virt pv --timeout 10 --jit ${{ matrix.jit }} riscv-tests/isa etiss/build/bin/bare_etiss_processor --fail
python etiss_riscv_tests/test.py --arch RV${{ matrix.xlen }}${{ matrix.exts }} --bits ${{ matrix.xlen }} --ext ${{ steps.string.outputs.lowercase }} --virt ${{ matrix.virt }} --timeout 10 --jit ${{ matrix.jit }} riscv-tests/isa etiss/build/bin/bare_etiss_processor --fail && FAILED=0 || FAILED=1
python3 gen_summary.py results_* --etiss-dir etiss --etiss-arch-riscv-dir etiss_arch_riscv --m2isar-dir M2-ISA-R --riscv-tests-dir riscv-tests >> $GITHUB_STEP_SUMMARY
python3 gen_messages.py results_*
- name: Archive files
uses: actions/upload-artifact@v3
if: ${{ always() }}
with:
name: result-rv${{ matrix.xlen }}-${{ matrix.virt }}-${{ steps.string.outputs.lowercase }}-${{ matrix.jit }}
path: results_*
merge:
runs-on: ubuntu-latest
needs: test
steps:
- name: Clone wrapper repo
uses: actions/checkout@v3
- name: Download reports' artifacts
uses: actions/download-artifact@v3
- name: Check downloaded files
run: |
ls -l