Fixed qubit operand ordering in SMIS and SMIT instructions
This solves the problem raised in issue #190.
The solution is also an optimization in the sense that previously 3 SMIS instructions were generated for the qubit operands 2,3 and 4 as:
smis s10, {2, 3, 4}
smis s11, {3, 2, 4}
smis s12, {4, 3, 4}
This also means three registers were used. With this solution, operands are ordered and a single SMIS instruction is generated to use a single register. The same explanation applies to 2 operand instructions.