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Merge pull request scala-network#16 from scala-network/xlarig-502
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Xlarig update to version 5.0.2
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Teredic authored Feb 3, 2020
2 parents 911fcfb + 7fd7300 commit c32d94a
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Showing 108 changed files with 7,589 additions and 6,012 deletions.
7 changes: 6 additions & 1 deletion CHANGELOG.md
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@@ -1,6 +1,11 @@
# v5.0.2

- Rebase from XMRig v5.5.1 [(changelog)](doc/CHANGELOG.md)


# v5.0.1

- Rebase from XMRig v5.4.0 [(changelog)](doc/CHANGELOG.md)
- Rebase from XMRig v5.4.0


# v5.0.0
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13 changes: 7 additions & 6 deletions CMakeLists.txt
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Expand Up @@ -2,18 +2,19 @@ cmake_minimum_required(VERSION 2.8)
project(xlarig)

option(WITH_LIBCPUID "Enable libcpuid support" ON)
option(WITH_HWLOC "Enable hwloc support" ON)
option(WITH_CN_LITE "Enable CryptoNight-Lite algorithms family" ON)
option(WITH_CN_HEAVY "Enable CryptoNight-Heavy algorithms family" ON)
option(WITH_CN_PICO "Enable CryptoNight-Pico algorithm" ON)
option(WITH_CN_GPU "Enable CryptoNight-GPU algorithm" ON)
option(WITH_HWLOC "Enable hwloc support" OFF)
option(WITH_CN_LITE "Enable CryptoNight-Lite algorithms family" OFF)
option(WITH_CN_HEAVY "Enable CryptoNight-Heavy algorithms family" OFF)
option(WITH_CN_PICO "Enable CryptoNight-Pico algorithm" OFF)
option(WITH_CN_GPU "Enable CryptoNight-GPU algorithm" OFF)
option(WITH_RANDOMX "Enable RandomX algorithms family" ON)
option(WITH_ARGON2 "Enable Argon2 algorithms family" ON)
option(WITH_HTTP "Enable HTTP protocol support (client/server)" ON)
option(WITH_DEBUG_LOG "Enable debug log output" OFF)
option(WITH_TLS "Enable OpenSSL support" ON)
option(WITH_ASM "Enable ASM PoW implementations" ON)
option(WITH_MSR "Enable MSR support" ON)
option(WITH_MSR "Enable MSR mod & 1st-gen Ryzen fix" ON)
option(WITH_ENV_VARS "Enable environment variables support in config file" ON)
option(WITH_EMBEDDED_CONFIG "Enable internal embedded JSON config" OFF)
option(WITH_OPENCL "Enable OpenCL backend" OFF)
option(WITH_CUDA "Enable CUDA backend" OFF)
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17 changes: 11 additions & 6 deletions README.md
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Expand Up @@ -23,7 +23,7 @@ Network:
-u, --user=USERNAME username for mining server
-p, --pass=PASSWORD password for mining server
-O, --userpass=U:P username:password pair for mining server
-k, --keepalive send keepalived packet for prevent timeout (needs pool support)
-k, --keepalive send keepalive packet for prevent timeout (needs pool support)
--nicehash enable nicehash.com support
--rig-id=ID rig identifier for pool-side statistics (needs pool support)
--tls enable SSL/TLS support (needs pool support)
Expand All @@ -47,11 +47,12 @@ CPU backend:
--cpu-no-yield prefer maximum hashrate rather than system response/stability
--no-huge-pages disable huge pages support
--asm=ASM ASM optimizations, possible values: auto, none, intel, ryzen, bulldozer
--randomx-init=N threads count to initialize RandomX dataset
--randomx-init=N thread count to initialize RandomX dataset
--randomx-no-numa disable NUMA support for RandomX
--randomx-mode=MODE RandomX mode: auto, fast, light
--randomx-1gb-pages use 1GB hugepages for dataset (Linux only)
--randomx-wrmsr=N write value (0-15) to Intel MSR register 0x1a4 or do nothing (-1) (Linux only)
--randomx-wrmsr=N write custom value (0-15) to Intel MSR register 0x1a4 or disable MSR mod (-1)
--randomx-no-rdmsr disable reverting initial MSR values on exit
API:
--api-worker-id=ID custom worker-id for API
Expand Down Expand Up @@ -84,9 +85,13 @@ The building instructions has been moved [here](doc/building.md)
## Donations
The donation mining in XLArig has been turned off, if you wish to help the original creators or the Scala Project team donate to the addresses below.

* XMR: `48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD`
* BTC: `1P7ujsXeX7GxQwHNnJsRMgAdNkFZmNVqJT`
* XLA: `SEiTBcLGpfm3uj5b5RaZDGSUoAGnLCyG5aJjAwko67jqRwWEH26NFPd26EUpdL1zh4RTmTdRWLz8WCmk5F4umYaFByMtJT6RLjD6vzApQJWfi`
* Original Creators addresses:
* XMR: `48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD`
* BTC: `1P7ujsXeX7GxQwHNnJsRMgAdNkFZmNVqJT`

* The Scala Project Team addresses:
* BTC: `1XTLY5LqdBXRW6hcHtnuMU7c68mAyW6qm`
* XLA: `SEiTBcLGpfm3uj5b5RaZDGSUoAGnLCyG5aJjAwko67jqRwWEH26NFPd26EUpdL1zh4RTmTdRWLz8WCmk5F4umYaFByMtJT6RLjD6vzApQJWfi`


## Contacts
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2 changes: 1 addition & 1 deletion cmake/cpu.cmake
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Expand Up @@ -8,7 +8,7 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(x86_64|AMD64)$")
endif()

if (NOT ARM_TARGET)
if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64|arm64|armv8-a)$")
if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64|arm64|armv8-a|armv8l)$")
set(ARM_TARGET 8)
elseif (CMAKE_SYSTEM_PROCESSOR MATCHES "^(armv7|armv7f|armv7s|armv7k|armv7-a|armv7l)$")
set(ARM_TARGET 7)
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2 changes: 2 additions & 0 deletions cmake/randomx.cmake
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Expand Up @@ -100,6 +100,7 @@ if (WITH_RANDOMX)

if (WITH_MSR AND NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8 AND (XMRIG_OS_WIN OR XMRIG_OS_LINUX))
add_definitions(/DXMRIG_FEATURE_MSR)
add_definitions(/DXMRIG_FIX_RYZEN)
message("-- WITH_MSR=ON")

if (XMRIG_OS_WIN)
Expand All @@ -112,6 +113,7 @@ if (WITH_RANDOMX)
list(APPEND SOURCES_CRYPTO src/crypto/rx/msr/MsrItem.cpp)
else()
remove_definitions(/DXMRIG_FEATURE_MSR)
remove_definitions(/DXMRIG_FIX_RYZEN)
message("-- WITH_MSR=OFF")
endif()
else()
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1 change: 0 additions & 1 deletion doc/ALGORITHMS.md
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Expand Up @@ -25,7 +25,6 @@ Option `coin` useful for pools without algorithm negotiation support or daemon t
| `cn/zls` | 2 MB | 2.14.0+ | CryptoNight variant 2 with 3/4 iterations. |
| `cn/double` | 2 MB | 2.14.0+ | CryptoNight variant 2 with double iterations. |
| `cn/r` | 2 MB | 2.13.0+ | CryptoNightR (Monero's variant 4). |
| `cn/wow` | 2 MB | 2.12.0+ | CryptoNightR (Wownero). |
| `cn/gpu` | 2 MB | 2.11.0+ | CryptoNight-GPU. |
| `cn-pico` | 256 KB | 2.10.0+ | CryptoNight-Pico. |
| `cn/half` | 2 MB | 2.9.0+ | CryptoNight variant 2 with half iterations. |
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19 changes: 19 additions & 0 deletions doc/CHANGELOG.md
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@@ -1,3 +1,22 @@
# v5.5.1
- [#1469](https://github.com/xmrig/xmrig/issues/1469) Fixed build with gcc 4.8.
- [#1473](https://github.com/xmrig/xmrig/pull/1473) Added RandomX auto-config for mobile Ryzen APUs.
- [#1477](https://github.com/xmrig/xmrig/pull/1477) Fixed build with Clang.
- [#1489](https://github.com/xmrig/xmrig/pull/1489) RandomX JIT compiler tweaks.
- [#1493](https://github.com/xmrig/xmrig/pull/1493) Default value for Intel MSR preset changed to `15`.
- Fixed unwanted resume after RandomX dataset change.

# v5.5.0
- [#179](https://github.com/xmrig/xmrig/issues/179) Added support for [environment variables](https://xmrig.com/docs/miner/environment-variables) in config file.
- [#1445](https://github.com/xmrig/xmrig/pull/1445) Removed `rx/v` algorithm.
- [#1453](https://github.com/xmrig/xmrig/issues/1453) Fixed crash on 32bit systems.
- [#1459](https://github.com/xmrig/xmrig/issues/1459) Fixed crash on very low memory systems.
- [#1465](https://github.com/xmrig/xmrig/pull/1465) Added fix for 1st-gen Ryzen crashes.
- [#1466](https://github.com/xmrig/xmrig/pull/1466) Added `cn-pico/tlo` algorithm.
- Added `--randomx-no-rdmsr` command line option.
- Added console title for Windows with miner name and version.
- On Windows `priority` option now also change base priority.

# v5.4.0
- [#1434](https://github.com/xmrig/xmrig/pull/1434) Added RandomSFX (`rx/sfx`) algorithm for Safex Cash.
- [#1445](https://github.com/xmrig/xmrig/pull/1445) Added RandomV (`rx/v`) algorithm for *new* MoneroV.
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20 changes: 20 additions & 0 deletions scripts/build_static/build_static_linux_aarch64.sh
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@@ -0,0 +1,20 @@
#!/bin/bash

## Script made for Debian 10 (AARCH64 VPS). You'll need to adapt the packages to your OS.

apt -y install build-essential cmake clang git openssl curl wget libuv1-dev libssl-dev libhwloc-dev automake libtool autoconf zip

git clone https://github.com/scala-network/XLArig xlarig --depth 1

rm -rf xlarig/build
mkdir xlarig/build
cd xlarig/scripts
chmod u+x build_deps.sh
./build_deps.sh

cd ../build

cmake .. -DWITH_HWLOC=OFF -DBUILD_STATIC=ON -DXMRIG_DEPS=scripts/deps -DARM_TARGET=8
make -j$(nproc)
strip xlarig
mv xlarig ~
20 changes: 20 additions & 0 deletions scripts/build_static/build_static_linux_armeabi-v7a.sh
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@@ -0,0 +1,20 @@
#!/bin/bash

## Script made for Debian 10 (AARCH64 VPS). You'll need to adapt the packages to your OS.

apt -y install build-essential cmake clang git openssl curl wget libuv1-dev libssl-dev libhwloc-dev automake libtool autoconf zip

git clone https://github.com/scala-network/XLArig xlarig --depth 1

rm -rf xlarig/build
mkdir xlarig/build
cd xlarig/scripts
chmod u+x build_deps.sh
./build_deps.sh

cd ../build

cmake .. -DWITH_HWLOC=OFF -DBUILD_STATIC=ON -DXMRIG_DEPS=scripts/deps -DARM_TARGET=7
make -j$(nproc)
strip xlarig
mv xlarig ~
20 changes: 20 additions & 0 deletions scripts/build_static/build_static_linux_x86-64.sh
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@@ -0,0 +1,20 @@
#!/bin/bash

## Script made for Debian 10. You'll need to adapt the packages to your OS.

apt -y install build-essential cmake clang git openssl curl wget libuv1-dev libssl-dev libhwloc-dev automake libtool autoconf zip

git clone https://github.com/scala-network/XLArig xlarig --depth 1

rm -rf xlarig/build
mkdir xlarig/build
cd xlarig/scripts
chmod u+x build_deps.sh
./build_deps.sh

cd ../build

cmake .. -DWITH_HWLOC=OFF -DBUILD_STATIC=ON -DXMRIG_DEPS=scripts/deps
make -j$(nproc)
strip xlarig
mv xlarig ~
2 changes: 1 addition & 1 deletion scripts/randomx_boost.sh
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Expand Up @@ -13,7 +13,7 @@ if cat /proc/cpuinfo | grep "AMD Ryzen" > /dev/null;
elif cat /proc/cpuinfo | grep "Intel" > /dev/null;
then
echo "Detected Intel"
wrmsr -a 0x1a4 6
wrmsr -a 0x1a4 0xf
echo "MSR register values for Intel applied"
else
echo "No supported CPU detected"
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1 change: 1 addition & 0 deletions src/backend/common/interfaces/IRxStorage.h
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Expand Up @@ -45,6 +45,7 @@ class IRxStorage
public:
virtual ~IRxStorage() = default;

virtual bool isAllocated() const = 0;
virtual HugePagesInfo hugePages() const = 0;
virtual RxDataset *dataset(const Job &job, uint32_t nodeId) const = 0;
virtual void init(const RxSeed &seed, uint32_t threads, bool hugePages, bool oneGbPages, RxConfig::Mode mode, int priority) = 0;
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3 changes: 2 additions & 1 deletion src/backend/cpu/CpuWorker.cpp
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Expand Up @@ -155,7 +155,8 @@ bool xmrig::CpuWorker<N>::selfTest()

# ifdef XMRIG_ALGO_CN_PICO
if (m_algorithm.family() == Algorithm::CN_PICO) {
return verify(Algorithm::CN_PICO_0, test_output_pico_trtl);
return verify(Algorithm::CN_PICO_0, test_output_pico_trtl) &&
verify(Algorithm::CN_PICO_TLO, test_output_pico_tlo);
}
# endif

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8 changes: 7 additions & 1 deletion src/backend/cuda/CudaWorker.cpp
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Expand Up @@ -78,9 +78,15 @@ xmrig::CudaWorker::CudaWorker(size_t id, const CudaLaunchData &data) :
break;
}

if (!m_runner || !m_runner->init()) {
if (!m_runner) {
return;
}

if (!m_runner->init()) {
delete m_runner;

m_runner = nullptr;
}
}


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2 changes: 1 addition & 1 deletion src/backend/cuda/runners/CudaBaseRunner.cpp
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Expand Up @@ -47,7 +47,7 @@ xmrig::CudaBaseRunner::~CudaBaseRunner()
bool xmrig::CudaBaseRunner::init()
{
m_ctx = CudaLib::alloc(m_data.thread.index(), m_data.thread.bfactor(), m_data.thread.bsleep());
if (CudaLib::deviceInfo(m_ctx, m_data.thread.blocks(), m_data.thread.threads(), m_data.algorithm, m_data.thread.datasetHost()) != 0) {
if (!callWrapper(CudaLib::deviceInfo(m_ctx, m_data.thread.blocks(), m_data.thread.threads(), m_data.algorithm, m_data.thread.datasetHost()))) {
return false;
}

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5 changes: 3 additions & 2 deletions src/backend/cuda/runners/CudaRxRunner.cpp
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Expand Up @@ -31,8 +31,9 @@
#include "crypto/rx/RxDataset.h"


xmrig::CudaRxRunner::CudaRxRunner(size_t index, const CudaLaunchData &data) : CudaBaseRunner(index, data),
m_datasetHost(data.thread.datasetHost() > 0)
xmrig::CudaRxRunner::CudaRxRunner(size_t index, const CudaLaunchData &data) :
CudaBaseRunner(index, data),
m_datasetHost(data.thread.datasetHost() > 0)
{
m_intensity = m_data.thread.threads() * m_data.thread.blocks();
const size_t scratchpads_size = m_intensity * m_data.algorithm.l3();
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4 changes: 2 additions & 2 deletions src/backend/cuda/wrappers/CudaDevice.cpp
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Expand Up @@ -41,7 +41,7 @@ xmrig::CudaDevice::CudaDevice(uint32_t index, int32_t bfactor, int32_t bsleep) :
m_index(index)
{
auto ctx = CudaLib::alloc(index, bfactor, bsleep);
if (CudaLib::deviceInfo(ctx, 0, 0, Algorithm::INVALID) != 0) {
if (!CudaLib::deviceInfo(ctx, 0, 0, Algorithm::INVALID)) {
CudaLib::release(ctx);

return;
Expand Down Expand Up @@ -107,7 +107,7 @@ uint32_t xmrig::CudaDevice::smx() const

void xmrig::CudaDevice::generate(const Algorithm &algorithm, CudaThreads &threads) const
{
if (CudaLib::deviceInfo(m_ctx, -1, -1, algorithm) != 0) {
if (!CudaLib::deviceInfo(m_ctx, -1, -1, algorithm)) {
return;
}

Expand Down
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