Fixed bit manipulation bugs

TUM-DSE · Feb 7, 2024 · 816a14e · 816a14e
1 parent 817078b
commit 816a14e
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Showing 2 changed files with 10 additions and 8 deletions.
diff --git a/cranelift/codegen/src/isa/aarch64/inst/emit.rs b/cranelift/codegen/src/isa/aarch64/inst/emit.rs
@@ -732,16 +732,18 @@ impl MachInstEmit for Inst {
             &MInst::Addg { rd, rn, imm6, imm4 } => {
                 // 1001000110{imm6}00{imm4}{Xn=rn}{Xd=rd}
                 let bits_31_22 = 0b1001000110;
+                let imm6: u32 = imm6.into();
                 let bits_15_14 = 0b00;
+                let imm4: u32 = imm4.into();
                 let rd = allocs.next_writable(rd);
                 let rn = allocs.next(rn);
 
                 sink.put4(
                     (bits_31_22 << 22)
-                        | (u32::from(imm6) << 16)
+                        | (imm6 << 16)
                         | (bits_15_14 << 14)
-                        | (u32::from(imm4) << 10)
-                        | (machreg_to_gpr(rn) << 4)
+                        | (imm4 << 10)
+                        | (machreg_to_gpr(rn) << 5)
                         | (machreg_to_gpr(rd.to_reg())),
                 );
             }

diff --git a/cranelift/wasm/src/state.rs b/cranelift/wasm/src/state.rs
@@ -265,14 +265,14 @@ fn insert_tag_from_index_into_index(
     to_index: Value,
     builder: &mut FunctionBuilder,
 ) -> Value {
-    // tag = from && 0x0F00... (keep only tag)
+    // tag = from & 0x0F00... (keep only tag)
     let tag = builder.ins().band_imm(from_index, MTE_TAG_BITS_MASK);
 
-    // to = to && 0xF0FF... (remove tag, keep rest)
-    let index_b = builder.ins().band_imm(to_index, MTE_NON_TAG_BITS_MASK);
+    // to = to & 0xF0FF... (remove tag, keep rest)
+    let to_index = builder.ins().band_imm(to_index, MTE_NON_TAG_BITS_MASK);
 
-    // to && tag
-    builder.ins().band(index_b, tag)
+    // to | tag
+    builder.ins().bor(to_index, tag)
 }
 
 impl FuncTranslationState {