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docs(test): add -B flag to make
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This ensures we're always rebuilding the simulation before running the tests.
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urish committed Apr 1, 2024
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Expand Up @@ -12,15 +12,15 @@ This is a sample testbench for a Tiny Tapeout project. It uses [cocotb](https://
To run the RTL simulation:

```sh
make
make -B
```

To run gatelevel simulation, first harden your project and copy `../runs/wokwi/results/final/verilog/gl/{your_module_name}.v` to `gate_level_netlist.v`.

Then run:

```sh
make GATES=yes
make -B GATES=yes
```

## How to view the VCD file
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