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ports/mimxrt: Restructure nxp_sdk to match official mcux-sdk.
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The official mcux-sdk follows a slightly different structure to the current nxp_sdk submodule, with many drivers moved to a common location.

To ease updating the newer versions of the SDK and/or add new families the nxp_sdk submodule has been updated to follow the structure of mcux-sdk, just trimmed down to families used here to considerably reduce the size.

Signed-off-by: Andrew Leech <[email protected]>
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@imi415 @pi-anl
imi415 authored and pi-anl committed Nov 14, 2024
1 parent 3844733 commit 952383f
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Showing 13 changed files with 276 additions and 195 deletions.
2 changes: 1 addition & 1 deletion .gitmodules
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@
url = https://github.com/bluekitchen/btstack.git
[submodule "lib/nxp_driver"]
path = lib/nxp_driver
url = https://github.com/hathach/nxp_driver.git
url = https://github.com/andrewleech/nxp_driver.git
[submodule "lib/libhydrogen"]
path = lib/libhydrogen
url = https://github.com/jedisct1/libhydrogen.git
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2 changes: 1 addition & 1 deletion lib/nxp_driver
Submodule nxp_driver updated 3170 files
112 changes: 77 additions & 35 deletions ports/mimxrt/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,8 @@ include $(TOP)/py/py.mk
include $(TOP)/extmod/extmod.mk

# Set SDK directory based on MCU_SERIES
MCU_DIR = lib/nxp_driver/sdk/devices/$(MCU_SERIES)
MCUX_SDK_DIR = lib/nxp_driver/sdk
MCU_DIR = $(MCUX_SDK_DIR)/devices/$(MCU_SERIES)

# Select linker scripts based on MCU_SERIES
LD_FILES = boards/$(MCU_SERIES).ld boards/common.ld
Expand All @@ -71,8 +72,6 @@ GEN_PINS_SRC = $(BUILD)/pins_gen.c
INC += -I$(BOARD_DIR)
INC += -I$(BUILD)
INC += -I$(TOP)
INC += -I$(TOP)/$(MCU_DIR)
INC += -I$(TOP)/$(MCU_DIR)/drivers
INC += -I$(TOP)/lib/cmsis/inc
INC += -I$(TOP)/lib/oofatfs
INC += -I$(TOP)/lib/tinyusb/hw
Expand Down Expand Up @@ -109,35 +108,38 @@ SRC_TINYUSB_C += \
# All settings for Ethernet support are controller by the value of MICROPY_PY_LWIP
ifeq ($(MICROPY_PY_LWIP),1)
SRC_ETH_C += \
$(MCU_DIR)/drivers/fsl_enet.c \
$(MCUX_SDK_DIR)/drivers/enet/fsl_enet.c \
hal/phy/device/phydp83825/fsl_phydp83825.c \
hal/phy/device/phydp83848/fsl_phydp83848.c \
hal/phy/device/phyksz8081/fsl_phyksz8081.c \
hal/phy/device/phylan8720/fsl_phylan8720.c \
hal/phy/device/phyrtl8211f/fsl_phyrtl8211f.c \
hal/phy/mdio/enet/fsl_enet_mdio.c

INC_HAL_IMX += \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/enet
endif

# NXP SDK sources
SRC_HAL_IMX_C += \
$(MCU_DIR)/drivers/fsl_clock.c \
$(MCU_DIR)/drivers/fsl_common.c \
$(MCU_DIR)/drivers/fsl_dmamux.c \
$(MCU_DIR)/drivers/fsl_edma.c \
$(MCU_DIR)/drivers/fsl_flexram.c \
$(MCU_DIR)/drivers/fsl_flexspi.c \
$(MCU_DIR)/drivers/fsl_gpc.c \
$(MCU_DIR)/drivers/fsl_gpio.c \
$(MCU_DIR)/drivers/fsl_gpt.c \
$(MCU_DIR)/drivers/fsl_lpi2c.c \
$(MCU_DIR)/drivers/fsl_lpspi.c \
$(MCU_DIR)/drivers/fsl_lpspi_edma.c \
$(MCU_DIR)/drivers/fsl_pit.c \
$(MCU_DIR)/drivers/fsl_pwm.c \
$(MCU_DIR)/drivers/fsl_sai.c \
$(MCU_DIR)/drivers/fsl_snvs_hp.c \
$(MCU_DIR)/drivers/fsl_snvs_lp.c \
$(MCU_DIR)/drivers/fsl_wdog.c \
$(MCUX_SDK_DIR)/drivers/common/fsl_common.c \
$(MCUX_SDK_DIR)/drivers/common/fsl_common_arm.c \
$(MCUX_SDK_DIR)/drivers/dmamux/fsl_dmamux.c \
$(MCUX_SDK_DIR)/drivers/edma/fsl_edma.c \
$(MCUX_SDK_DIR)/drivers/flexram/fsl_flexram.c \
$(MCUX_SDK_DIR)/drivers/flexspi/fsl_flexspi.c \
$(MCUX_SDK_DIR)/drivers/igpio/fsl_gpio.c \
$(MCUX_SDK_DIR)/drivers/gpt/fsl_gpt.c \
$(MCUX_SDK_DIR)/drivers/lpi2c/fsl_lpi2c.c \
$(MCUX_SDK_DIR)/drivers/lpspi/fsl_lpspi.c \
$(MCUX_SDK_DIR)/drivers/lpspi/fsl_lpspi_edma.c \
$(MCUX_SDK_DIR)/drivers/pit/fsl_pit.c \
$(MCUX_SDK_DIR)/drivers/pwm/fsl_pwm.c \
$(MCUX_SDK_DIR)/drivers/sai/fsl_sai.c \
$(MCUX_SDK_DIR)/drivers/snvs_hp/fsl_snvs_hp.c \
$(MCUX_SDK_DIR)/drivers/snvs_lp/fsl_snvs_lp.c \
$(MCUX_SDK_DIR)/drivers/wdog01/fsl_wdog.c \
$(MCU_DIR)/system_$(MCU_SERIES)$(MCU_CORE).c \

# Use a specific boot header for 1062 so the Teensy loader doesn't erase the filesystem.
Expand All @@ -147,39 +149,81 @@ else
SRC_HAL_IMX_C += $(MCU_DIR)/xip/fsl_flexspi_nor_boot.c
endif

INC_HAL_IMX += \
-I$(TOP)/$(MCU_DIR) \
-I$(TOP)/$(MCU_DIR)/drivers \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/common \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/dmamux \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/edma \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/flexram \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/flexspi \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/igpio \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/gpt \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpi2c \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpspi \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpuart \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/pit \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/pwm \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/sai \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/snvs_hp \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/snvs_lp \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/wdog01 \

ifeq ($(MICROPY_HW_SDRAM_AVAIL),1)
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_semc.c
SRC_HAL_IMX_C += $(MCUX_SDK_DIR)/drivers/semc/fsl_semc.c
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/semc
endif

ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_usdhc.c
SRC_HAL_IMX_C += $(MCUX_SDK_DIR)/drivers/usdhc/fsl_usdhc.c
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/usdhc
endif

ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1015 MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
SRC_HAL_IMX_C += \
$(MCU_DIR)/drivers/fsl_qtmr.c \
$(MCUX_SDK_DIR)/drivers/qtmr_1/fsl_qtmr.c \
$(MCU_DIR)/drivers/fsl_romapi.c

INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/qtmr_1
endif

ifeq ($(MCU_SERIES), MIMXRT1176)
INC += -I$(TOP)/$(MCU_DIR)/drivers/cm7

SRC_HAL_IMX_C += \
$(MCU_DIR)/drivers/cm7/fsl_cache.c \
$(MCU_DIR)/drivers/fsl_dcdc.c \
$(MCU_DIR)/drivers/fsl_pmu.c \
$(MCU_DIR)/drivers/fsl_common_arm.c \
$(MCU_DIR)/drivers/fsl_anatop_ai.c \
$(MCU_DIR)/drivers/fsl_caam.c \
$(MCU_DIR)/drivers/fsl_lpadc.c \
$(MCU_DIR)/drivers/fsl_mu.c
$(MCU_DIR)/drivers/fsl_soc_src.c \
$(MCU_DIR)/drivers/fsl_gpc.c \
$(MCUX_SDK_DIR)/drivers/caam/fsl_caam.c \
$(MCUX_SDK_DIR)/drivers/lpadc/fsl_lpadc.c \
$(MCUX_SDK_DIR)/drivers/mu/fsl_mu.c

INC_HAL_IMX += \
-I$(TOP)/$(MCU_DIR)/drivers/cm7 \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/caam \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpadc \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/mu

CFLAGS += -DCACHE_MODE_WRITE_THROUGH=1
else
SRC_HAL_IMX_C += \
$(MCU_DIR)/drivers/fsl_adc.c \
$(MCU_DIR)/drivers/fsl_cache.c \
$(MCU_DIR)/drivers/fsl_trng.c
$(MCUX_SDK_DIR)/drivers/adc_12b1msps_sar/fsl_adc.c \
$(MCUX_SDK_DIR)/drivers/cache/armv7-m7/fsl_cache.c \
$(MCUX_SDK_DIR)/drivers/gpc_1/fsl_gpc.c \
$(MCUX_SDK_DIR)/drivers/src/fsl_src.c \
$(MCUX_SDK_DIR)/drivers/trng/fsl_trng.c

INC_HAL_IMX += \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/adc_12b1msps_sar \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/cache/armv7-m7 \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/gpc_1 \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/src \
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/trng
endif

INC += $(INC_HAL_IMX)

# C source files
SRC_C += \
board_init.c \
Expand Down Expand Up @@ -352,8 +396,6 @@ CFLAGS += \
-DMICROPY_HW_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE) \
-DMICROPY_HW_SDRAM_AVAIL=$(MICROPY_HW_SDRAM_AVAIL) \
-DMICROPY_HW_SDRAM_SIZE=$(MICROPY_HW_SDRAM_SIZE) \
-DSPI_RETRY_TIMES=1000000 \
-DUART_RETRY_TIMES=1000000 \
-DXIP_BOOT_HEADER_ENABLE=1 \
-DXIP_EXTERNAL_FLASH=1 \
-fdata-sections \
Expand Down
42 changes: 21 additions & 21 deletions ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h
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Original file line number Diff line number Diff line change
Expand Up @@ -21,14 +21,14 @@
#define MICROPY_HW_UART_INDEX { 1, 3, 2, 6, 8 }

#define IOMUX_TABLE_UART \
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TX }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RX }, \
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TXD }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RXD }, \
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TXD }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RXD }, \
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TXD }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RXD }, \
{ 0 }, { 0 }, \
{ 0 }, { 0 }, \
{ IOMUXC_GPIO_AD_B0_02_LPUART6_TX }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RX }, \
{ IOMUXC_GPIO_AD_B0_02_LPUART6_TXD }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RXD }, \
{ 0 }, { 0 }, \
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX },
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TXD }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RXD },

#define IOMUX_TABLE_UART_CTS_RTS \
{ IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B }, { IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B }, \
Expand Down Expand Up @@ -111,22 +111,22 @@
}

// --- SEMC --- //
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DATA00
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DATA01
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DATA02
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DATA03
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DATA04
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DATA05
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DATA06
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DATA07
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DATA08
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DATA09
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DATA10
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DATA11
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DATA12
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DATA13
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DATA14
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DATA15
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DA00
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DA01
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DA02
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DA03
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DA04
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DA05
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DA06
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DA07
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DA08
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DA09
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DA10
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DA11
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DA12
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DA13
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DA14
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DA15

#define MIMXRT_IOMUXC_SEMC_ADDR00 IOMUXC_GPIO_EMC_09_SEMC_ADDR00
#define MIMXRT_IOMUXC_SEMC_ADDR01 IOMUXC_GPIO_EMC_10_SEMC_ADDR01
Expand Down
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