[Mellanox] update buffers and align QoS to add support for DSCP remap…

…ping (for Dual-Tor on t1) for Mellanox-SN4700-O8C48 Signed-off-by: Andriy Yurkiv <[email protected]>
ayurkiv-nvda · Aug 22, 2024 · 9c8bf75 · 9c8bf75
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diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -12,21 +12,36 @@
     limitations under the License.
 #}
 {% set default_cable = '5m' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '45088768' %}
+{% set ingress_lossless_pool_xoff  =  '8298496' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '45088768' %}
+{%- else -%}
 {% set ingress_lossless_pool_size =  '44433408' %}
 {% set ingress_lossless_pool_xoff  =  '9576448' %}
 {% set egress_lossless_pool_size =  '60817392' %}
 {% set egress_lossy_pool_size =  '44433408' %}
+{%- endif -%}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
 {%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
 {{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -12,10 +12,17 @@
     limitations under the License.
 #}
 {% set default_cable = '300m' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '39026688' %}
+{% set ingress_lossless_pool_xoff  =  '13115392' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '39026688' %}
+{%- else -%}
 {% set ingress_lossless_pool_size =  '44089344' %}
 {% set ingress_lossless_pool_xoff  =  '9920512' %}
 {% set egress_lossless_pool_size =  '60817392' %}
 {% set egress_lossy_pool_size =  '44089344' %}
+{%- endif -%}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
@@ -27,10 +34,18 @@
 {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
 {%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2
@@ -1 +1 @@
-../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
+../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
		../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2