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v2.2.0

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@DallonTG DallonTG released this 29 Sep 18:53
· 52 commits to master since this release
v2.2.0
1f2e9f5
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Minor Changes:

  • Support for RAMB36E1 and FIF036E1 dynamic pin mappings (#356).
  • Added support for updating the pin mappings using the tile type, site index and name of the BEL of interest (#356).
  • Added family info & cell library for Zynq and device files for xc7z020clg400 (#349).

Patches / Bug Fixes:

  • Added case for bidir pin wires for compressed XDLRCs (#346).
  • Fixed TCP writer to not export user properties to edif (#338).
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