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Merge dev-integrate --> main #240

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Update Package Imports (#219)
howardtr authored Sep 15, 2023
commit cb3a325795fea3a1d637ca60338c4221ccb1c692
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_cipher_control.sv
Original file line number Diff line number Diff line change
@@ -8,7 +8,9 @@

`include "caliptra_prim_assert.sv"

module aes_cipher_control import aes_pkg::*;
module aes_cipher_control
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter bit SecMasking = 0,
parameter sbox_impl_e SecSBoxImpl = SBoxImplDom
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_cipher_control_fsm.sv
Original file line number Diff line number Diff line change
@@ -8,7 +8,9 @@

`include "caliptra_prim_assert.sv"

module aes_cipher_control_fsm import aes_pkg::*;
module aes_cipher_control_fsm
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter bit SecMasking = 0,
parameter sbox_impl_e SecSBoxImpl = SBoxImplDom
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_cipher_control_fsm_n.sv
Original file line number Diff line number Diff line change
@@ -11,7 +11,9 @@
// - inverting these signals between the regular FSM and the caliptra_prim_buf synthesis barriers.
// Synthesis tools will then push the inverters into the actual FSM.

module aes_cipher_control_fsm_n import aes_pkg::*;
module aes_cipher_control_fsm_n
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter bit SecMasking = 0,
parameter sbox_impl_e SecSBoxImpl = SBoxImplDom
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_cipher_control_fsm_p.sv
Original file line number Diff line number Diff line change
@@ -7,7 +7,9 @@
// This module contains the AES cipher core control FSM operating on
// and producing the positive values of important control signals.

module aes_cipher_control_fsm_p import aes_pkg::*;
module aes_cipher_control_fsm_p
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter bit SecMasking = 0,
parameter sbox_impl_e SecSBoxImpl = SBoxImplDom
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_cipher_core.sv
Original file line number Diff line number Diff line change
@@ -92,7 +92,9 @@

`include "caliptra_prim_assert.sv"

module aes_cipher_core import aes_pkg::*;
module aes_cipher_core
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter bit AES192Enable = 1,
parameter bit SecMasking = 1,
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_key_expand.sv
Original file line number Diff line number Diff line change
@@ -6,7 +6,9 @@

`include "caliptra_prim_assert.sv"

module aes_key_expand import aes_pkg::*;
module aes_key_expand
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter bit AES192Enable = 1,
parameter bit SecMasking = 0,
1 change: 1 addition & 0 deletions src/aes/rtl/aes_mix_columns.sv
Original file line number Diff line number Diff line change
@@ -10,6 +10,7 @@ module aes_mix_columns (
output logic [3:0][3:0][7:0] data_o
);

import aes_reg_pkg::*;
import aes_pkg::*;

// Transpose to operate on columns
1 change: 1 addition & 0 deletions src/aes/rtl/aes_mix_single_column.sv
Original file line number Diff line number Diff line change
@@ -13,6 +13,7 @@ module aes_mix_single_column (
output logic [3:0][7:0] data_o
);

import aes_reg_pkg::*;
import aes_pkg::*;

logic [3:0][7:0] x;
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_prng_masking.sv
Original file line number Diff line number Diff line change
@@ -20,7 +20,9 @@

`include "caliptra_prim_assert.sv"

module aes_prng_masking import aes_pkg::*;
module aes_prng_masking
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter int unsigned Width = WidthPRDMasking, // Must be divisble by ChunkSize and 8
parameter int unsigned ChunkSize = ChunkSizePRDMasking, // Width of the LFSR primitives
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_sbox.sv
Original file line number Diff line number Diff line change
@@ -6,7 +6,9 @@

`include "caliptra_prim_assert.sv"

module aes_sbox import aes_pkg::*;
module aes_sbox
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter sbox_impl_e SecSBoxImpl = SBoxImplLut
) (
1 change: 1 addition & 0 deletions src/aes/rtl/aes_sbox_canright.sv
Original file line number Diff line number Diff line change
@@ -13,6 +13,7 @@ module aes_sbox_canright (
output logic [7:0] data_o
);

import aes_reg_pkg::*;
import aes_pkg::*;
import aes_sbox_canright_pkg::*;

1 change: 1 addition & 0 deletions src/aes/rtl/aes_sbox_canright_masked.sv
Original file line number Diff line number Diff line change
@@ -40,6 +40,7 @@ module aes_masked_inverse_gf2p4 (
output logic [3:0] b_inv
);

import aes_reg_pkg::*;
import aes_pkg::*;
import aes_sbox_canright_pkg::*;

1 change: 1 addition & 0 deletions src/aes/rtl/aes_sbox_canright_masked_noreuse.sv
Original file line number Diff line number Diff line change
@@ -39,6 +39,7 @@ module aes_masked_inverse_gf2p4_noreuse (
output logic [3:0] b_inv
);

import aes_reg_pkg::*;
import aes_pkg::*;
import aes_sbox_canright_pkg::*;

1 change: 1 addition & 0 deletions src/aes/rtl/aes_sbox_dom.sv
Original file line number Diff line number Diff line change
@@ -1000,6 +1000,7 @@ module aes_sbox_dom
output logic [19:0] prd_o // PRD for usage in Stages 2 - 4 of other S-Box instances
);

import aes_reg_pkg::*;
import aes_pkg::*;
import aes_sbox_canright_pkg::*;

1 change: 1 addition & 0 deletions src/aes/rtl/aes_sbox_lut.sv
Original file line number Diff line number Diff line change
@@ -10,6 +10,7 @@ module aes_sbox_lut (
output logic [7:0] data_o
);

import aes_reg_pkg::*;
import aes_pkg::*;

// Define the LUTs
1 change: 1 addition & 0 deletions src/aes/rtl/aes_sel_buf_chk.sv
Original file line number Diff line number Diff line change
@@ -23,6 +23,7 @@ module aes_sel_buf_chk #(
output logic err_o
);

import aes_reg_pkg::*;
import aes_pkg::*;

// Tie off unused inputs.
1 change: 1 addition & 0 deletions src/aes/rtl/aes_shift_rows.sv
Original file line number Diff line number Diff line change
@@ -10,6 +10,7 @@ module aes_shift_rows (
output logic [3:0][3:0][7:0] data_o
);

import aes_reg_pkg::*;
import aes_pkg::*;

// Row 0 is left untouched
4 changes: 3 additions & 1 deletion src/aes/rtl/aes_sub_bytes.sv
Original file line number Diff line number Diff line change
@@ -4,7 +4,9 @@
//
// AES SubBytes

module aes_sub_bytes import aes_pkg::*;
module aes_sub_bytes
import aes_reg_pkg::*;
import aes_pkg::*;
#(
parameter sbox_impl_e SecSBoxImpl = SBoxImplDom
) (
6 changes: 5 additions & 1 deletion src/caliptra_prim/rtl/caliptra_prim_lc_sync.sv
Original file line number Diff line number Diff line change
@@ -10,7 +10,11 @@

`include "caliptra_prim_assert.sv"

module caliptra_prim_lc_sync #(
module caliptra_prim_lc_sync
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
// Number of separately buffered output signals.
// The buffer cells have a don't touch constraint
// on them such that synthesis tools won't collapse
17 changes: 10 additions & 7 deletions src/csrng/rtl/csrng.sv
Original file line number Diff line number Diff line change
@@ -9,9 +9,12 @@
module csrng
import csrng_pkg::*;
import csrng_reg_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
parameter aes_pkg::sbox_impl_e SBoxImpl = aes_pkg::SBoxImplCanright,
parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
parameter logic [csrng_reg_pkg::NumAlerts-1:0] AlertAsyncOn = {csrng_reg_pkg::NumAlerts{1'b1}},
parameter int NHwApps = 2,
parameter cs_keymgr_div_t RndCnstCsKeymgrDivNonProduction = CsKeymgrDivWidth'(0),
parameter cs_keymgr_div_t RndCnstCsKeymgrDivProduction = CsKeymgrDivWidth'(0),
@@ -56,8 +59,8 @@ module csrng
output csrng_rsp_t [NHwApps-1:0] csrng_cmd_o,

// Alerts
input caliptra_prim_alert_pkg::alert_rx_t [NumAlerts-1:0] alert_rx_i,
output caliptra_prim_alert_pkg::alert_tx_t [NumAlerts-1:0] alert_tx_o,
input caliptra_prim_alert_pkg::alert_rx_t [csrng_reg_pkg::NumAlerts-1:0] alert_rx_i,
output caliptra_prim_alert_pkg::alert_tx_t [csrng_reg_pkg::NumAlerts-1:0] alert_tx_o,

// Interrupts
output logic intr_cs_cmd_req_done_o,
@@ -69,10 +72,10 @@ module csrng
csrng_reg2hw_t reg2hw;
csrng_hw2reg_t hw2reg;

logic [NumAlerts-1:0] alert_test;
logic [NumAlerts-1:0] alert;
logic [csrng_reg_pkg::NumAlerts-1:0] alert_test;
logic [csrng_reg_pkg::NumAlerts-1:0] alert;

logic [NumAlerts-1:0] intg_err_alert;
logic [csrng_reg_pkg::NumAlerts-1:0] intg_err_alert;
assign intg_err_alert[0] = 1'b0;

// SEC_CM: CONFIG.REGWEN
@@ -143,7 +146,7 @@ module csrng
///////////////////////////
// Alert generation
///////////////////////////
for (genvar i = 0; i < NumAlerts; i++) begin : gen_alert_tx
for (genvar i = 0; i < csrng_reg_pkg::NumAlerts; i++) begin : gen_alert_tx
caliptra_prim_alert_sender #(
.AsyncOn(AlertAsyncOn[i]),
.IsFatal(i)
7 changes: 6 additions & 1 deletion src/csrng/rtl/csrng_core.sv
Original file line number Diff line number Diff line change
@@ -6,7 +6,12 @@
//


module csrng_core import csrng_pkg::*; #(
module csrng_core
import csrng_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
parameter aes_pkg::sbox_impl_e SBoxImpl = aes_pkg::SBoxImplLut,
parameter int NHwApps = 2,
parameter cs_keymgr_div_t RndCnstCsKeymgrDivNonProduction = CsKeymgrDivWidth'(0),
7 changes: 6 additions & 1 deletion src/entropy_src/rtl/entropy_src_core.sv
Original file line number Diff line number Diff line change
@@ -5,7 +5,12 @@
// Description: entropy_src core module
//

module entropy_src_core import entropy_src_pkg::*; #(
module entropy_src_core
import entropy_src_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
parameter int EsFifoDepth = 4
) (
input logic clk_i,
3 changes: 3 additions & 0 deletions src/integration/rtl/caliptra_top.sv
Original file line number Diff line number Diff line change
@@ -21,6 +21,9 @@ module caliptra_top
import kv_defines_pkg::*;
import pv_defines_pkg::*;
import soc_ifc_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
`ifdef CALIPTRA_INTERNAL_TRNG
import entropy_src_pkg::*;
import csrng_pkg::*;
3 changes: 3 additions & 0 deletions src/kmac/rtl/keccak_2share.sv
Original file line number Diff line number Diff line change
@@ -9,6 +9,9 @@

module keccak_2share
import caliptra_prim_mubi_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
parameter int Width = 1600, // b= {25, 50, 100, 200, 400, 800, 1600}

3 changes: 3 additions & 0 deletions src/kmac/rtl/keccak_round.sv
Original file line number Diff line number Diff line change
@@ -9,6 +9,9 @@

module keccak_round
import caliptra_prim_mubi_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
parameter int Width = 1600, // b= {25, 50, 100, 200, 400, 800, 1600}

3 changes: 3 additions & 0 deletions src/kmac/rtl/sha3.sv
Original file line number Diff line number Diff line change
@@ -10,6 +10,9 @@

module sha3
import sha3_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
// Enable Masked Keccak if 1
parameter bit EnMasking = 0,
3 changes: 3 additions & 0 deletions src/kmac/rtl/sha3pad.sv
Original file line number Diff line number Diff line change
@@ -8,6 +8,9 @@

module sha3pad
import sha3_pkg::*;
import lc_ctrl_state_pkg::*;
import lc_ctrl_reg_pkg::*;
import lc_ctrl_pkg::*;
#(
parameter bit EnMasking = 0,
localparam int Share = (EnMasking) ? 2 : 1