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Reintegrate main -> dev-msft #320

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merged 22 commits into from
Dec 1, 2023
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b473793
Add test for Mailbox JTAG accesses with clock gating
robertszczepanski Aug 24, 2023
5608dfa
Merge pull request #238 from chipsalliance/main
calebofearth Oct 3, 2023
5eb4852
Merge pull request #197 from antmicro/rszc/jtag-cg-test
andreslagarcavilla Oct 25, 2023
7a499fa
Spec update with synthesis warnings and jtag tck requirement
Nov 10, 2023
869c44f
Added some more description
Nov 13, 2023
5bbdd26
Apply suggestion from review
Nov 13, 2023
fd928d2
Remove accidentally placed description
Nov 13, 2023
63ad025
Merge pull request #292 from chipsalliance/kupadhyayula-msft-integ-sp…
bharatpillilli Nov 13, 2023
1ce9ea6
Update expected mailbox rdptr value
mkurc-ant Nov 14, 2023
f12c8fe
Merge pull request #296 from chipsalliance/dev-msft
calebofearth Nov 14, 2023
4a89cff
Remove I3C interface placeholder comment (#300)
calebofearth Nov 15, 2023
674ac5f
Merge pull request #302 from antmicro/mkurc/fix-mailbox-test
mcockrell-google Nov 16, 2023
986b12a
Remove support for JTAG read IDCODE instruction from VeeR TAP
mkurc-ant Nov 14, 2023
cf4903d
Remove expected IDCODE from OpenOCD config
mkurc-ant Nov 14, 2023
7589fe4
Merge pull request #298 from antmicro/mkurc/remove-idcode
kgugala Nov 21, 2023
0a512a7
initial markdown conversion of hardware spec
steph-morton Nov 21, 2023
eeb0a57
[README] Update VCS steps (#308)
calebofearth Nov 22, 2023
532117f
Merge pull request #309 from chipsalliance/stephm-newdoc
andreslagarcavilla Nov 28, 2023
63a40f0
Fix VCS invocation in Makefile so that DPI functions get compiled. (#…
mkurc-ant Nov 30, 2023
c1ad07c
Merge pull request #319 from chipsalliance/dev-msft
calebofearth Dec 1, 2023
9082743
Merge pull request #310 from chipsalliance/dev-public
calebofearth Dec 1, 2023
e181daf
Merge pull request #299 from chipsalliance/dev-integrate
andreslagarcavilla Dec 1, 2023
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Remove accidentally placed description
  • Loading branch information
Kiran Upadhyayula committed Nov 13, 2023
commit fd928d25a3daf4ba909fb8d39dfdb3ad6437b1ea
2 changes: 1 addition & 1 deletion docs/CaliptraIntegrationSpecification.md
Original file line number Diff line number Diff line change
@@ -654,7 +654,7 @@ The following table describes SoC integration requirements.
| :--------- | :--------- | :--------- | :--------- |
| sha512_acc_top | Empty netlist for always_comb | 417 |Unused logic (no load)|
| ecc_scalar_blinding | Netlist for always_ff block does not contain flip flop | 301 |Output width is smaller than internal signals, synthesis optimizes away the extra internal flops with no loads|
| sha512_masked_core | "masked_carry" is read before being assigned. Synthesized result may not match simulation | 295, 312 |Output width is smaller than internal signals, synthesis optimizes away the extra internal flops with no loads|
| sha512_masked_core | "masked_carry" is read before being assigned. Synthesized result may not match simulation | 295, 312 ||
| ecc_montgomerymultiplier | Netlist for always_ff block does not contain flip flop | 274, 326 |Output width is smaller than internal signals, synthesis optimizes away the extra internal flops with no loads|
| Multiple modules | Signed to unsigned conversion occurs | ||