[RTL] Disable RV USER_MODE and SMEPMP #633
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…on't change any macro values or add new ones
…ith updated timestamp and hash after successful run
Nitsirks
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Nov 13, 2024
nileshbpat
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Nov 13, 2024
Nitsirks
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* Reorganize defines.h to match ordering from VeeR repo latest -- but don't change any macro values or add new ones * Disable USER_MODE and SMEPMP (PMP is enabled by default, per chipsalliance/Cores-VeeR-EL2#258) * Syntax fix for clean lint (multibit signal used as boolean) * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-rv-dis-smepmp' with updated timestamp and hash after successful run
calebofearth
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Nov 21, 2024
commit 569c433 Author: Caleb Whitehead <[email protected]> Date: Wed Nov 20 15:14:20 2024 -0800 rsvd placeholders are sw=r,hw=w to help future DMI updates be more maintainable commit afa06d5 Author: Nitsirks <[email protected]> Date: Wed Nov 20 13:06:40 2024 -0800 adding rsvd fields to better maintain dmi read/writes commit c48bda8 Author: Caleb Whitehead <[email protected]> Date: Wed Nov 20 13:00:28 2024 -0800 Shift FUSE REG offsets to better match 1.1 legacy offsets commit 966f37c Author: Caleb Whitehead <[email protected]> Date: Wed Nov 20 12:44:31 2024 -0800 Update Subsystem mode link from main spec; describe straps and generic functions; update debug_intent commit 48ddd48 Author: Michael Norris <[email protected]> Date: Wed Nov 20 20:29:22 2024 +0000 MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/tap_mbox_integ' with updated timestamp and hash after successful run commit 44b2136 Author: Caleb Whitehead <[email protected]> Date: Tue Nov 19 17:39:22 2024 -0800 Rename SS_STRAP_RSVD to SS_STRAP_GENERIC. Add SS regs to external regs docs list. commit 4924e5a Author: Caleb Whitehead <[email protected]> Date: Tue Nov 19 15:14:54 2024 -0800 Fix strap bit size in integ spec commit 05a14df Author: Michael Norris <[email protected]> Date: Tue Nov 19 23:34:50 2024 +0000 MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/tap_mbox_integ' with updated timestamp and hash after successful run commit bc82cbe Author: Nitsirks <[email protected]> Date: Tue Nov 19 14:33:13 2024 -0800 fixing polarity of security state unlock out of reset commit 6adcda0 Author: Michael Norris <[email protected]> Date: Tue Nov 19 21:46:30 2024 +0000 MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/tap_mbox_integ' with updated timestamp and hash after successful run commit 8756524 Author: Caleb Whitehead <[email protected]> Date: Tue Nov 19 12:45:24 2024 -0800 Fix a few comments that refer to AXI ID (now AXI USER) commit 979693f Merge: ae4b897 4ae54c3 Author: Nitsirks <[email protected]> Date: Tue Nov 19 12:42:44 2024 -0800 Merge branch 'main' into user/dev/michnorris/tap_mbox_integ commit ae4b897 Author: Caleb <[email protected]> Date: Tue Nov 19 12:25:54 2024 -0800 [RTL] Convert AXI_ID to AXI_USER (#642) * Convert AXI_ID to AXI_USER * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-axi-user' with updated timestamp and hash after successful run * Revert default user value of 1 - this is driven in TB when needed * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-axi-user' with updated timestamp and hash after successful run commit 48828bd Author: Michael Norris <[email protected]> Date: Tue Nov 19 19:06:40 2024 +0000 MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/tap_mbox_integ' with updated timestamp and hash after successful run commit a7c651c Author: Nitsirks <[email protected]> Date: Tue Nov 19 09:59:51 2024 -0800 revert the live security state capture, instead capture on reset only update the security state capture if dbg level is appropriately set commit 9f6b72e Author: Caleb Whitehead <[email protected]> Date: Tue Nov 19 09:48:08 2024 -0800 Remove ss_dbg_prod_enable output bit commit 4f51abf Author: Caleb Whitehead <[email protected]> Date: Mon Nov 18 19:35:00 2024 -0800 in utils.sh: 'date +%s' is more portable than 'EPOCHSECONDS' commit 5f389c9 Author: Caleb Whitehead <[email protected]> Date: Mon Nov 18 18:58:39 2024 -0800 Remove unused signal declarations commit 6665d97 Author: Caleb Whitehead <[email protected]> Date: Mon Nov 18 18:57:28 2024 -0800 Remove unused signal declarations commit ddfb3d8 Merge: b0a5fde 0d787f8 Author: Caleb Whitehead <[email protected]> Date: Mon Nov 18 16:24:52 2024 -0800 Merge remote-tracking branch 'chips/cwhitehead-msft-straps-regs-2p0' into user/dev/michnorris/tap_mbox_integ commit 0d787f8 Author: Caleb Whitehead <[email protected]> Date: Mon Nov 18 16:23:25 2024 -0800 Addressing tweak in fuse_reg to better preserve legacy offsets commit b0a5fde Author: Nitsirks <[email protected]> Date: Mon Nov 18 15:53:51 2024 -0800 typo commit 231c5da Author: Nitsirks <[email protected]> Date: Mon Nov 18 15:31:16 2024 -0800 reverting change for github issue 422 - rejected commit f21a069 Author: Nitsirks <[email protected]> Date: Mon Nov 18 15:30:16 2024 -0800 adding readable hw/fw erro rencodings to uncore tap commit 5fd1b23 Author: Caleb Whitehead <[email protected]> Date: Mon Nov 18 15:29:10 2024 -0800 Increase SS_GENERIC_FW_EXEC_CTRL width to 128b commit 9021681 Author: Nitsirks <[email protected]> Date: Mon Nov 18 15:04:11 2024 -0800 missing arcs for dlen latching for new tap mode state transitions commit 42d9de4 Author: Nitsirks <[email protected]> Date: Mon Nov 18 15:03:40 2024 -0800 github issue 422 - reset value of device lifecycle UNPROVISIONED commit 1664a10 Author: Caleb Whitehead <[email protected]> Date: Mon Nov 18 14:49:20 2024 -0800 Rename SS_SOC_IFC_BASE_ADDR to CPTRA; make SS_GENERIC_FW_EXEC_CTRL 128b; Key Manifest Mask Fuse->256b commit 2e4feda Author: Nitsirks <[email protected]> Date: Mon Nov 18 14:40:57 2024 -0800 fixing port list fixed signal name in soc ifc after moving from caliptra top commit cb5faf3 Author: Nitsirks <[email protected]> Date: Mon Nov 18 14:14:51 2024 -0800 removed capture condition on security state wires moved dmi reg mode masking to inside soc ifc top fixed register permissions for DBG REQ added flush and debug condition for lifecycle states NOT in MANUF or PROD commit 6592f42 Author: Nitsirks <[email protected]> Date: Mon Nov 18 11:15:35 2024 -0800 fixing latch commit 3c5e734 Merge: 1ecf6ae 227b1d5 Author: Nitsirks <[email protected]> Date: Mon Nov 18 11:09:28 2024 -0800 Merge branch 'main' into user/dev/michnorris/tap_mbox_integ commit 1ecf6ae Merge: 1614171 aa362ea Author: Nitsirks <[email protected]> Date: Mon Nov 18 10:23:53 2024 -0800 Merge branch 'main' into user/dev/michnorris/tap_mbox_integ commit 1614171 Author: Nitsirks <[email protected]> Date: Sun Nov 17 12:59:32 2024 -0800 adding tap interface to new registers commit dcc5525 Merge: 8e5be01 f78dedb Author: Nitsirks <[email protected]> Date: Sun Nov 17 09:05:03 2024 -0800 Merge branch 'cwhitehead-msft-straps-regs-2p0' into user/dev/michnorris/tap_mbox_integ commit f78dedb Author: Caleb Whitehead <[email protected]> Date: Sat Nov 16 22:17:01 2024 -0800 Syntax fixes; cleanup for clean compile; regenerated RDL; fixed port connections commit 6d80e1c Author: Caleb Whitehead <[email protected]> Date: Fri Nov 15 18:15:54 2024 -0800 Latest register set + generated RDL outputs + integ spec updates. Does not compile. commit 8e5be01 Author: Nitsirks <[email protected]> Date: Fri Nov 15 13:50:01 2024 -0800 adding tap state to mailbox for tap mailbox feature. commit dbf52da Author: Caleb <[email protected]> Date: Fri Nov 15 11:35:44 2024 -0800 [TB] Update soc_ifc C lib to support import by caliptra-ss (#637) * Remove inline fn in header so it can be included to caliptra-ss * Restamp repo after rebase commit a8aca5f Author: Michael Norris <[email protected]> Date: Thu Nov 14 15:16:39 2024 -0800 csr hmac signing key (#630) * csr hmac signing key implementation uvm hmac collaterals updated to validate the new flow * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/csr_hmac_key' with updated timestamp and hash after successful run * adding swwe to all control bits so they can only be set when ready * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/csr_hmac_key' with updated timestamp and hash after successful run * updating specifications for csr hmac key and key vault changes * details about csr mode in hw spec * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/csr_hmac_key' with updated timestamp and hash after successful run commit 49d6857 Author: Caleb <[email protected]> Date: Wed Nov 13 16:25:28 2024 -0800 [RTL] Disable RV USER_MODE and SMEPMP (#633) * Reorganize defines.h to match ordering from VeeR repo latest -- but don't change any macro values or add new ones * Disable USER_MODE and SMEPMP (PMP is enabled by default, per chipsalliance/Cores-VeeR-EL2#258) * Syntax fix for clean lint (multibit signal used as boolean) * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-rv-dis-smepmp' with updated timestamp and hash after successful run commit c327135 Author: Nitsirks <[email protected]> Date: Fri Nov 15 14:27:02 2024 -0800 start of tap mailbox changes commit bd5cb84 Author: Caleb <[email protected]> Date: Tue Nov 12 12:37:22 2024 -0800 [ENV] Fix path to smoke_test_doe_cg in nightly directed regression list (#632) * Fix path to smoke_test_doe_cg in nightly dir. regression list * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-dir-regr-fix' with updated timestamp and hash after successful run commit 1b7a6a1 Author: Caleb <[email protected]> Date: Mon Nov 11 18:02:52 2024 -0800 Upgrade RV core to latest, enable SMEPMP and User Mode (#628) * Override reset_vec to 0x0 with script call option (no longer need to hand-edit script) * Refactor iccm config for maintainability * VeeR core update to latest design file version * Add rev info file to indicate VeeR version consumed * Remove JTAG IDCODE command, as previously done * Route a core_enable signal to conditionally disable internal core TAP access * Add a dmi_active output signal * Updated RV instance for compatibility with latest DMI export signals * Updated VeeR mem export interface splits data/ecc * Enable SMEPMP with 64-entries; enable user-mode * Update directory includes/dependencies * Requires soc_ifc_pkg * Port width fix * First index is for bank number - fix * Move localparams to top of file, so they exist at the first usage * Update license headers on RV core * Regenerate file lists * Revert latch fix that causes Verilator failures * Replace 'repeat' (verilator dislikes) with for-loop; add missing begin-end * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-rv-upgrade' with updated timestamp and hash after successful run commit a0d92c7 Author: Caleb Whitehead <[email protected]> Date: Wed Nov 13 16:31:07 2024 -0800 Add MCI base address strap commit 4707887 Author: Caleb Whitehead <[email protected]> Date: Wed Nov 13 16:21:52 2024 -0800 More robust arg parsing commit 4b6f86a Author: Caleb Whitehead <[email protected]> Date: Wed Nov 13 15:57:36 2024 -0800 Remove fuse_life_cycle from soc_ifc_tb commit ad9c366 Author: Caleb Whitehead <[email protected]> Date: Wed Nov 13 15:52:45 2024 -0800 Add fw/hw cap, debug_auth_pk regs, debug unlock tokens, subsystem strap bank; rm lifecycle fuse; rename ready_for_fw; regenerate RDL commit c1f9dce Author: Caleb Whitehead <[email protected]> Date: Wed Nov 13 15:45:52 2024 -0800 Use cmd line arg to build covergroups/sample include files commit 89a3630 Author: Caleb Whitehead <[email protected]> Date: Tue Nov 12 11:09:59 2024 -0800 Move fuse_owner_pk_hash to CPTRA_OWNER_PK_HASH * Add new dedicated lock register for CPTRA_OWNER_PK_HASH * Drive CPTRA_OWNER_PK_HASH swwel appropriately * Update val collateral * Update coverage groups * Regenerate RDL outputs from changes * Addresses #540 commit 972038f Author: Caleb Whitehead <[email protected]> Date: Mon Nov 11 17:42:02 2024 -0800 Regenerate with fuse regs changes commit ef12ba3 Author: Caleb Whitehead <[email protected]> Date: Mon Nov 11 17:36:00 2024 -0800 Remove fuse_lms_verify; add fuse_mldsa_revocation, per chipsalliance/Caliptra#235 commit c29d13c Author: Caleb Whitehead <[email protected]> Date: Fri Nov 8 14:46:40 2024 -0800 New subsystem reg region in soc_ifc_reg commit b356e74 Author: Caleb Whitehead <[email protected]> Date: Fri Nov 8 14:46:22 2024 -0800 Add active mode bit to HW_CONFIG reg
calebofearth
added a commit
that referenced
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Nov 21, 2024
* Add active mode bit to HW_CONFIG reg * New subsystem reg region in soc_ifc_reg * Remove fuse_lms_verify; add fuse_mldsa_revocation, per chipsalliance/Caliptra#235 * Regenerate with fuse regs changes * Move fuse_owner_pk_hash to CPTRA_OWNER_PK_HASH * Add new dedicated lock register for CPTRA_OWNER_PK_HASH * Drive CPTRA_OWNER_PK_HASH swwel appropriately * Update val collateral * Update coverage groups * Regenerate RDL outputs from changes * Addresses #540 * Use cmd line arg to build covergroups/sample include files * Add fw/hw cap, debug_auth_pk regs, debug unlock tokens, subsystem strap bank; rm lifecycle fuse; rename ready_for_fw; regenerate RDL * Remove fuse_life_cycle from soc_ifc_tb * More robust arg parsing * Add MCI base address strap * Upgrade RV core to latest, enable SMEPMP and User Mode (#628) * Override reset_vec to 0x0 with script call option (no longer need to hand-edit script) * Refactor iccm config for maintainability * VeeR core update to latest design file version * Add rev info file to indicate VeeR version consumed * Remove JTAG IDCODE command, as previously done * Route a core_enable signal to conditionally disable internal core TAP access * Add a dmi_active output signal * Updated RV instance for compatibility with latest DMI export signals * Updated VeeR mem export interface splits data/ecc * Enable SMEPMP with 64-entries; enable user-mode * Update directory includes/dependencies * Requires soc_ifc_pkg * Port width fix * First index is for bank number - fix * Move localparams to top of file, so they exist at the first usage * Update license headers on RV core * Regenerate file lists * Revert latch fix that causes Verilator failures * Replace 'repeat' (verilator dislikes) with for-loop; add missing begin-end * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-rv-upgrade' with updated timestamp and hash after successful run * [ENV] Fix path to smoke_test_doe_cg in nightly directed regression list (#632) * Fix path to smoke_test_doe_cg in nightly dir. regression list * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-dir-regr-fix' with updated timestamp and hash after successful run * start of tap mailbox changes * [RTL] Disable RV USER_MODE and SMEPMP (#633) * Reorganize defines.h to match ordering from VeeR repo latest -- but don't change any macro values or add new ones * Disable USER_MODE and SMEPMP (PMP is enabled by default, per chipsalliance/Cores-VeeR-EL2#258) * Syntax fix for clean lint (multibit signal used as boolean) * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-rv-dis-smepmp' with updated timestamp and hash after successful run * csr hmac signing key (#630) * csr hmac signing key implementation uvm hmac collaterals updated to validate the new flow * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/csr_hmac_key' with updated timestamp and hash after successful run * adding swwe to all control bits so they can only be set when ready * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/csr_hmac_key' with updated timestamp and hash after successful run * updating specifications for csr hmac key and key vault changes * details about csr mode in hw spec * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/csr_hmac_key' with updated timestamp and hash after successful run * [TB] Update soc_ifc C lib to support import by caliptra-ss (#637) * Remove inline fn in header so it can be included to caliptra-ss * Restamp repo after rebase * adding tap state to mailbox for tap mailbox feature. * Latest register set + generated RDL outputs + integ spec updates. Does not compile. * Syntax fixes; cleanup for clean compile; regenerated RDL; fixed port connections * adding tap interface to new registers * fixing latch * removed capture condition on security state wires moved dmi reg mode masking to inside soc ifc top fixed register permissions for DBG REQ added flush and debug condition for lifecycle states NOT in MANUF or PROD * fixing port list fixed signal name in soc ifc after moving from caliptra top * Rename SS_SOC_IFC_BASE_ADDR to CPTRA; make SS_GENERIC_FW_EXEC_CTRL 128b; Key Manifest Mask Fuse->256b * github issue 422 - reset value of device lifecycle UNPROVISIONED * missing arcs for dlen latching for new tap mode state transitions * Increase SS_GENERIC_FW_EXEC_CTRL width to 128b * adding readable hw/fw erro rencodings to uncore tap * reverting change for github issue 422 - rejected * typo * Addressing tweak in fuse_reg to better preserve legacy offsets * Remove unused signal declarations * Remove unused signal declarations * in utils.sh: 'date +%s' is more portable than 'EPOCHSECONDS' * Remove ss_dbg_prod_enable output bit * revert the live security state capture, instead capture on reset only update the security state capture if dbg level is appropriately set * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/michnorris/tap_mbox_integ' with updated timestamp and hash after successful run * [RTL] Convert AXI_ID to AXI_USER (#642) * Convert AXI_ID to AXI_USER * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-axi-user' with updated timestamp and hash after successful run * Revert default user value of 1 - this is driven in TB when needed * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-axi-user' with updated timestamp and hash after successful run * Fix a few comments that refer to AXI ID (now AXI USER) --------- Co-authored-by: Caleb Whitehead <[email protected]> Co-authored-by: Caleb <[email protected]>
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Disable SMEPMP as it is not required for the baseline PMP feature.
PMP is enabled by default, per chipsalliance/Cores-VeeR-EL2#258
SMEPMP is an extended feature that implicitly only applies when USER_MODE is enabled, which is not the use-case for Caliptra Core in 2.0.
Partially addresses #631