Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

8345296: AArch64: VM crashes with SIGILL when prctl is disallowed #84

Open
wants to merge 1 commit into
base: develop
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
10 changes: 8 additions & 2 deletions src/hotspot/cpu/aarch64/register_aarch64.hpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2024, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
Expand Down Expand Up @@ -165,7 +165,13 @@ class FloatRegister {
max_slots_per_register = 4,
save_slots_per_register = 2,
slots_per_neon_register = 4,
extra_save_slots_per_neon_register = slots_per_neon_register - save_slots_per_register
extra_save_slots_per_neon_register = slots_per_neon_register - save_slots_per_register,
neon_vl = 16,
// VLmax: The maximum sve vector length is determined by the hardware
// sve_vl_min <= VLmax <= sve_vl_max.
sve_vl_min = 16,
// Maximum supported vector length across all CPUs
sve_vl_max = 256
};

class FloatRegisterImpl: public AbstractRegisterImpl {
Expand Down
15 changes: 14 additions & 1 deletion src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@

#include "precompiled.hpp"
#include "pauth_aarch64.hpp"
#include "register_aarch64.hpp"
#include "runtime/arguments.hpp"
#include "runtime/globals_extension.hpp"
#include "runtime/java.hpp"
Expand Down Expand Up @@ -442,7 +443,19 @@ void VM_Version::initialize() {
}

if (UseSVE > 0) {
_initial_sve_vector_length = get_current_sve_vector_length();
int vl = get_current_sve_vector_length();
if (vl < 0) {
warning("Unable to get SVE vector length on this system. "
"Disabling SVE. Specify -XX:UseSVE=0 to shun this warning.");
FLAG_SET_DEFAULT(UseSVE, 0);
} else if ((vl == 0) || ((vl % FloatRegister::sve_vl_min) != 0) || !is_power_of_2(vl)) {
warning("Detected SVE vector length (%d) should be a power of two and a multiple of %d. "
"Disabling SVE. Specify -XX:UseSVE=0 to shun this warning.",
vl, FloatRegister::sve_vl_min);
FLAG_SET_DEFAULT(UseSVE, 0);
} else {
_initial_sve_vector_length = vl;
}
}

// This machine allows unaligned memory accesses
Expand Down
Loading