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Change control flow generation scheme #114

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Change control flow generation scheme #114

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3307990
Change control flow generation scheme
Mar 6, 2020
5678412
Fix undef-bug.ll phi case
Mar 13, 2020
9d34abc
Drop hiddenstack intrinsic
Mar 17, 2020
08d5901
Improve asm formatting
Mar 17, 2020
bd9790e
Drop PUSH_GLOBAL_ADDRESS, PUSHCONT_LABEL
Mar 18, 2020
d5e4cf8
Optimize function return
Mar 19, 2020
3876755
Improve conditional throwing
Mar 23, 2020
c7feb0d
Minor improvement
Mar 30, 2020
78931e2
Support a large number of BBs
Mar 31, 2020
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4 changes: 0 additions & 4 deletions llvm/include/llvm/IR/IntrinsicsTVM.td
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Original file line number Diff line number Diff line change
Expand Up @@ -674,8 +674,4 @@ let TargetPrefix = "tvm" in {
foreach i = 1-255 in
def int_tvm_unpackfirst#i : GCCBuiltin<"__builtin_tvm_unpackfirst"#i>,
Intrinsic<!listsplat(llvm_i257_ty, i), [llvm_TVMTuple_ty], [IntrNoMem]>;

def int_tvm_hiddenstack :
GCCBuiltin<"__builtin_tvm_hiddenstack">,
Intrinsic<[llvm_i257_ty], [llvm_i257_ty], [IntrNoMem]>;
}
2 changes: 2 additions & 0 deletions llvm/lib/CodeGen/TailDuplicator.cpp
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Expand Up @@ -747,10 +747,12 @@ bool TailDuplicator::duplicateSimpleBB(
}

// Avoid adding fall through branches.
if (TII->canFallthrough(*PredFBB, *NextBB)) { // TVM local
if (PredFBB == NextBB)
PredFBB = nullptr;
if (PredTBB == NextBB && PredFBB == nullptr)
PredTBB = nullptr;
}

auto DL = PredBB->findBranchDebugLoc();
TII->removeBranch(*PredBB);
Expand Down
2 changes: 0 additions & 2 deletions llvm/lib/Target/TVM/CMakeLists.txt
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Expand Up @@ -31,14 +31,12 @@ add_llvm_target(TVMCodeGen
TVMReplacePhysRegs.cpp
TVMRegStackify.cpp
TVMRegNumbering.cpp
TVMPeephole.cpp
TVMStack.cpp
TVMStackBlockInfo.cpp
TVMStackFixup.cpp
TVMStackPatterns.cpp
TVMStackModel.cpp
TVMUtilities.cpp
TVMContinuationsHoist.cpp
TVMLoadStoreReplace.cpp
TVMIfConversionTerm.cpp
)
Expand Down
21 changes: 0 additions & 21 deletions llvm/lib/Target/TVM/InstPrinter/TVMInstPrinter.cpp
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Expand Up @@ -32,25 +32,6 @@ using namespace llvm;

void TVMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot, const MCSubtargetInfo &STI) {
// TODO: A hack, we have the same logic in AsmPrinter, but it's not triggered
// for instructions in TVM::PUSHCONT_MBB. Need to find a better solution.
switch (MI->getOpcode()) {
case TVM::TO_TUPLE_COPY_S:
case TVM::TO_SLICE_COPY_S:
case TVM::TO_BUILDER_COPY_S:
case TVM::TO_CELL_COPY_S:
case TVM::FROM_TUPLE_COPY_S:
case TVM::FROM_SLICE_COPY_S:
case TVM::FROM_BUILDER_COPY_S:
case TVM::FROM_CELL_COPY_S:
case TVM::REG_TO_REG_COPY_S:
case TVM::PUSH_GLOBAL_ADDRESS_S:
case TVM::FALLTHROUGH_RETURN:
return;
default:
break;
}

{
std::string Str;
raw_string_ostream OStr(Str);
Expand Down Expand Up @@ -80,8 +61,6 @@ void TVMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
if (const auto *Expr = dyn_cast<TVMImmStringMCExpr>(Op.getExpr())) {
O << Expr->getString();
} else {
assert((Info.OperandType == TVM::OPERAND_FUNCTION) &&
"Unimplemented expression type");
// The actual label address is not known at the moment of
// code generation; to simplify further linking, the label name
// is surrounded with dollar signs ($callee$).
Expand Down
4 changes: 0 additions & 4 deletions llvm/lib/Target/TVM/TVM.h
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Expand Up @@ -34,11 +34,9 @@ FunctionPass *createTVMPrepareForLiveIntervals();
FunctionPass *createTVMRematerialize();
FunctionPass *createTVMRegStackify();
FunctionPass *createTVMRegNumbering();
FunctionPass *createTVMPeephole();
FunctionPass *createTVMStackModel();
FunctionPass *createTVMLoopInstructions();
FunctionPass *createTVMLoopPrepare();
FunctionPass *createTVMContinuationsHoist();
FunctionPass *createTVMIfConversionTerm();
BasicBlockPass *createTVMLoadStoreReplace();

Expand All @@ -49,11 +47,9 @@ void initializeTVMPrepareForLiveIntervalsPass(PassRegistry &);
void initializeTVMRematerializePass(PassRegistry &);
void initializeTVMRegStackifyPass(PassRegistry &);
void initializeTVMRegNumberingPass(PassRegistry &);
void initializeTVMPeepholePass(PassRegistry &);
void initializeTVMStackModelPass(PassRegistry &);
void initializeTVMLoopInstructionsPass(PassRegistry &);
void initializeTVMLoopPreparePass(PassRegistry &);
void initializeTVMContinuationsHoistPass(PassRegistry &);
void initializeTVMLoadStoreReplacePass(PassRegistry &);
void initializeTVMIfConversionTermPass(PassRegistry &);

Expand Down
151 changes: 54 additions & 97 deletions llvm/lib/Target/TVM/TVMAsmPrinter.cpp
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Expand Up @@ -49,20 +49,17 @@ class TVMAsmPrinter : public AsmPrinter {
void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
const char *Modifier = nullptr);
void EmitInstruction(const MachineInstr *MI) override;
bool ShouldPrintNextBlock(const MachineBasicBlock &CurMBB) const override;
std::string regToString(const MachineOperand &MO);
void EmitBasicBlockStart(const MachineBasicBlock &MBB) const override;
void EmitBasicBlockEnd(const MachineBasicBlock &MBB) override;
void EmitFunctionBodyEnd() override;

void EmitFunctionHeader() override;

/// Print a big LLVM constant int (>64 bit) to the .s file.
void EmitBigInt(const ConstantInt *CI) override;

bool runOnMachineFunction(MachineFunction &MF) override;
protected:
void EmitSubBlockForPushcont(const TVMMCInstLower &lower, const MCInst &Inst,
int depth);
void EmitBBEntry(const MachineBasicBlock &MBB) const;
private:
TVMFunctionInfo *MFI;
};
Expand Down Expand Up @@ -97,7 +94,7 @@ void TVMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,

//===----------------------------------------------------------------------===//
void TVMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
LLVM_DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
LLVM_DEBUG(dbgs() << "EmitInstruction: " << *MI);
if (isVerbose())
for (auto Comment : MFI->getStackModelComments(MI)) {
OutStreamer->AddComment(Comment);
Expand All @@ -120,9 +117,9 @@ void TVMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case TVM::FROM_BUILDER_COPY_S:
case TVM::FROM_CELL_COPY_S:
break;
case TVM::FALLTHROUGH_RETURN:
case TVM::RETURN_N_S:
if (isVerbose()) {
OutStreamer->AddComment("fallthrough return");
OutStreamer->AddComment("implicit return");
OutStreamer->AddBlankLine();
}
break;
Expand All @@ -131,112 +128,72 @@ void TVMAsmPrinter::EmitInstruction(const MachineInstr *MI) {

MCInst TmpInst;
MCInstLowering.lower(MI, TmpInst);
// We need to access OutStreamer->GetOS() to have such code pattern:
// (tabs for first offset from labels ans 2-spaces nested PUSHCONTs)
// \tInstr1
// \tInstr2
// \tPUSHCONT
// \t{
// \t Instr3
// \t Instr4
// \t PUSHCONT
// \t {
// \t Instr5
// \t Instr6
// \t }
// \t}
OutStreamer->GetOS() << "\t";
OutStreamer->GetOS() << (MF->size() < 2 ? " " : " ");
EmitToStreamer(*OutStreamer, TmpInst);
if (TmpInst.getOpcode() == TVM::PUSHCONT_MBB_S) {
EmitSubBlockForPushcont(MCInstLowering, TmpInst, 0);
}
}
}

bool TVMAsmPrinter::ShouldPrintNextBlock(const MachineBasicBlock &CurMBB) const {
auto Term = CurMBB.terminators();
// Continue if no terminators or fallthrough terminator
if (Term.begin() == Term.end() ||
Term.begin()->getOpcode() == TVM::IFJMP_S ||
Term.begin()->getOpcode() == TVM::IFNOTJMP_S)
return true;
return false;
void TVMAsmPrinter::EmitBasicBlockStart(const MachineBasicBlock &MBB) const {
if (MF->size() < 2)
return;
OutStreamer->AddComment(MBB.getName());
OutStreamer->EmitRawText(" PUSHCONT {");
}

void TVMAsmPrinter::EmitBBEntry(const MachineBasicBlock &MBB) const {
if (isVerbose()) {
if (const BasicBlock *BB = MBB.getBasicBlock()) {
if (BB->hasName()) {
BB->printAsOperand(OutStreamer->GetCommentOS(), false, BB->getModule());
OutStreamer->GetCommentOS() << '\n';
}
}
auto BBStackComment = MFI->getStackModelBBComment(&MBB);
if (!BBStackComment.empty())
OutStreamer->AddComment(BBStackComment, true);
}
OutStreamer->emitRawComment(" %bb." + Twine(MBB.getNumber()) + ":", false);
void TVMAsmPrinter::EmitBasicBlockEnd(const MachineBasicBlock &MBB) {
if (MF->size() < 2)
return;
OutStreamer->EmitRawText(" }");
}

void TVMAsmPrinter::EmitSubBlockForPushcont(const TVMMCInstLower &lower,
const MCInst &Inst,
int depth) {
OutStreamer->EmitRawText("\t" + std::string(depth, ' ') + "{\n");
void TVMAsmPrinter::EmitFunctionHeader() {
const Function &F = MF->getFunction();
if (F.hasFnAttribute("tvm_raw_func")) {
OutStreamer->EmitRawText("\t.internal\t:" + CurrentFnSym->getName());
} else {
AsmPrinter::EmitFunctionHeader();
}
}

const auto &Mapping = lower.getMCInstrsMap();
const MachineBasicBlock *MBB = nullptr;
void TVMAsmPrinter::EmitFunctionBodyEnd() {
unsigned Blocks = MF->size();
if (Blocks < 2)
return;

auto I = llvm::find_if(Inst, [](const MCOperand &op) { return op.isInst(); });
if (I != Inst.end()) {
auto MIit = Mapping.find(I->getInst());
if (MIit != Mapping.end()) {
if ((MBB = MIit->second->getParent()))
EmitBBEntry(*MBB);
auto *FI = MF->getInfo<TVMFunctionInfo>();
unsigned Arguments = FI->getParams().size();
unsigned ReturnValues = FI->getResults().size();

if (Arguments > 0) {
if (Blocks <= 16 && Arguments <= 16) {
OutStreamer->EmitRawText(" BLKSWAP\t" + Twine(Arguments) + ", " +
Twine(Blocks));
} else {
OutStreamer->EmitRawText(" PUSHINT\t" + Twine(Arguments));
OutStreamer->EmitRawText(" PUSHINT\t" + Twine(Blocks));
OutStreamer->EmitRawText(" BLKSWX");
}
}

for (const auto &op : Inst) {
if (op.isInst()) {
auto &curInst = *op.getInst();
if (isVerbose()) {
auto MIit = Mapping.find(&curInst);
// PUSHCONT_MBB comment will be printed later, at closing brace '}'
if (MIit != Mapping.end() && curInst.getOpcode() != TVM::PUSHCONT_MBB_S)
for (auto &Comment : MFI->getStackModelComments(MIit->second))
OutStreamer->AddComment(Comment);
if (curInst.getOpcode() == TVM::FALLTHROUGH_RETURN) {
OutStreamer->AddComment("fallthrough return");
OutStreamer->AddBlankLine();
}
}
OutStreamer->GetOS() << "\t";
static_cast<formatted_raw_ostream &>(OutStreamer->GetOS()).
PadToColumn(10 + depth);
EmitToStreamer(*OutStreamer, curInst);
if (curInst.getOpcode() == TVM::PUSHCONT_MBB_S)
EmitSubBlockForPushcont(lower, curInst, depth + 2);
OutStreamer->EmitRawText(" PUSH s" + Twine(Blocks + Arguments - 1));
OutStreamer->EmitRawText(" EXECUTE");

if (ReturnValues > 0) {
if (Blocks <= 16 && ReturnValues <= 16) {
OutStreamer->EmitRawText(" BLKSWAP\t" + Twine(Blocks) + ", " +
Twine(ReturnValues));
} else {
OutStreamer->EmitRawText(" PUSHINT\t" + Twine(Blocks));
OutStreamer->EmitRawText(" PUSHINT\t" + Twine(ReturnValues));
OutStreamer->EmitRawText(" BLKSWX");
}
}
if (isVerbose()) {
// Print PUSHCONT_MBB comments at close brace '}'
auto MIit = Mapping.find(&Inst);
if (MIit != Mapping.end())
for (auto &Comment : MFI->getStackModelComments(MIit->second))
OutStreamer->AddComment(Comment);
}
OutStreamer->EmitRawText("\t" + std::string(depth, ' ') + "}\n");
}

void TVMAsmPrinter::EmitBasicBlockStart(const MachineBasicBlock &MBB) const {
EmitBBEntry(MBB);
}

void TVMAsmPrinter::EmitFunctionHeader() {
const Function &F = MF->getFunction();
if (F.hasFnAttribute("tvm_raw_func")) {
OutStreamer->EmitRawText("\t.internal\t:" + CurrentFnSym->getName());
if (Blocks < 16) {
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Can we avoid the magic number here?

OutStreamer->EmitRawText(" BLKDROP\t" + Twine(Blocks));
} else {
AsmPrinter::EmitFunctionHeader();
OutStreamer->EmitRawText(" PUSHINT\t" + Twine(Blocks));
OutStreamer->EmitRawText(" DROPX");
}
}

Expand Down
22 changes: 11 additions & 11 deletions llvm/lib/Target/TVM/TVMCellInstrInfo.td
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Expand Up @@ -79,16 +79,16 @@ defm LDI : I<(outs I257 : $x, Slice : $sliceo),
(outs), (ins uimm1_256 : $precision),
[(set I257 : $x, Slice : $sliceo,
(int_tvm_ldi Slice : $slicei, uimm1_256 : $precision))],
"LDI\t $precision, $slicei, $x, $sliceo",
"LDI\t $precision", 0xd2>;
"LDI\t$precision, $slicei, $x, $sliceo",
"LDI\t$precision", 0xd2>;

defm LDU : I<(outs I257 : $x, Slice : $sliceo),
(ins Slice : $slicei, uimm1_256 : $precision),
(outs), (ins uimm1_256 : $precision),
[(set I257 : $x, Slice : $sliceo,
(int_tvm_ldu Slice : $slicei, uimm1_256 : $precision))],
"LDU\t $precision, $slicei, $x, $sliceo",
"LDU\t $precision", 0xd3>;
"LDU\t$precision, $slicei, $x, $sliceo",
"LDU\t$precision", 0xd3>;

defm LDIX : I0<(outs I257 : $x, Slice : $sliceo),
(ins Slice : $slicei, I257 : $precision),
Expand All @@ -107,8 +107,8 @@ defm LDUQ : I<(outs I257:$x, Slice:$sliceo, I257:$succ),
(outs), (ins uimm1_256:$precision),
[(set I257:$x, Slice:$sliceo, I257:$succ,
(int_tvm_lduq Slice:$slicei, uimm1_256:$precision))],
"LDUQ\t $precision, $slicei, $x, $sliceo, $succ",
"LDUQ\t $precision NULLROTRIFNOT", 0xd70d>;
"LDUQ\t$precision, $slicei, $x, $sliceo, $succ",
"LDUQ\t$precision NULLROTRIFNOT", 0xd70d>;

defm LDUXQ : I0<(outs I257:$x, Slice:$sliceo, I257:$succ),
(ins Slice:$slicei, I257:$precision),
Expand Down Expand Up @@ -162,16 +162,16 @@ defm PLDI : I<(outs I257:$x),
(outs), (ins uimm1_256:$precision),
[(set I257:$x,
(int_tvm_pldi Slice:$slicei, uimm1_256:$precision))],
"PLDI\t $precision, $slicei, $x",
"PLDI\t $precision", 0xd70a00>;
"PLDI\t$precision, $slicei, $x",
"PLDI\t$precision", 0xd70a00>;

defm PLDU : I<(outs I257:$x),
(ins Slice:$slicei, uimm1_256:$precision),
(outs), (ins uimm1_256:$precision),
[(set I257:$x,
(int_tvm_pldu Slice:$slicei, uimm1_256:$precision))],
"PLDU\t $precision, $slicei, $x",
"PLDU\t $precision", 0xd70b00>;
"PLDU\t$precision, $slicei, $x",
"PLDU\t$precision", 0xd70b00>;

defm PLDIX : I0<(outs I257:$x), (ins Slice:$slicei, I257:$precision),
[(set I257:$x, (int_tvm_pldu Slice:$slicei, I257:$precision))],
Expand All @@ -194,7 +194,7 @@ defm STUXR : I0<(outs Builder : $builder),
defm LDREFRTOS : I<(outs Slice:$cellslice, Slice:$sliceo), (ins Slice:$slicei),
(outs), (ins),
[(set Slice:$cellslice, Slice:$sliceo, (int_tvm_ldrefrtos Slice:$slicei))],
"LDREFRTOS\t $cellslice, $sliceo, $slicei", "LDREFRTOS", 0xd5>;
"LDREFRTOS\t$cellslice, $sliceo, $slicei", "LDREFRTOS", 0xd5>;

let hasSideEffects = 1 in
defm LDREF : I<(outs Cell:$ocell, Slice:$oslice), (ins Slice:$islice),
Expand Down
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