threaded irq in user space

Makefile

@@ -52,7 +52,8 @@ $(eval BOARD_$(BOARD)=y)
 KCONFIG_FILES = \
 	platform/Kconfig \
 	kernel/Kconfig \
-	loader/Kconfig
+	loader/Kconfig \
+	user/Kconfig
 
 # Read configurations about system features and characteristics
 include mk/config.mk

include/interrupt.h

@@ -0,0 +1,15 @@
+#ifndef INTERRUPT_H_
+#define INTERRUPT_H_
+
+#define DEFAULT_PRIORITY	1
+
+void user_interrupt_config(tcb_t *from);
+void user_interrupt_handler_update(tcb_t *thr);
+
+/* Platform depended */
+void user_irq_enable(int irq);
+void user_irq_disable(int irq);
+void user_irq_set_pending(int irq);
+void user_irq_clear_pending(int irq);
+
+#endif

include/interrupt_ipc.h

@@ -0,0 +1,24 @@
+#ifndef INTERRUPT_IPC_H_
+#define INTERRUPT_IPC_H_
+
+/* interrupt ipc message */
+enum {
+    IRQ_IPC_IRQN = 0,
+    IRQ_IPC_TID = 1,
+    IRQ_IPC_HANDLER = 2,
+    IRQ_IPC_ACTION = 3,
+    IRQ_IPC_PRIORITY = 4
+};
+
+#define IRQ_IPC_MSG_NUM	IRQ_IPC_PRIORITY
+
+/* irq actions */
+enum {
+    USER_IRQ_ENABLE = 0,
+    USER_IRQ_DISABLE = 1,
+    USER_IRQ_FREE = 2
+};
+
+#define USER_INTERRUPT_LABEL	0x928
+
+#endif

include/ipc.h

@@ -12,4 +12,7 @@
 void sys_ipc(uint32_t *param1);
 uint32_t ipc_deliver(void *data);
 
+uint32_t ipc_read_mr(tcb_t *from, int i);
+void ipc_write_mr(tcb_t *to, int i, uint32_t data);
+
 #endif /* IPC_H_ */

include/platform/stm32f1/nvic.h

@@ -67,6 +67,7 @@ typedef enum IRQn {
 	EXTI15_10_IRQn		= 40,	/*!< External Line[15:10] Interrupts */
 	RTC_Alarm_IRQn		= 41,	/*!< RTC Alarm (A and B) through EXTI Line Interrupt */
 	OTG_FS_WKUP_IRQn	= 42,	/*!< USB OTG FS Wakeup through EXTI line interrupt */
+	IRQn_NUM,
 } IRQn_Type;
 
 #define MAX_IRQn FPU_IRQn

include/platform/stm32f4/exti.h

@@ -0,0 +1,28 @@
+#ifndef PLATFORM_STM32F4_EXTI_H_
+#define PLATFORM_STM32F4_EXTI_H_
+
+#include <platform/stm32f4/registers.h>
+#include <platform/stm32f4/gpio.h>
+
+/* EXTI mode */
+#define EXTI_INTERRUPT_MODE				0x0
+#define EXTI_EVENT_MODE					0x4
+
+/* EXTI trigger type */
+#define EXTI_RISING_TRIGGER				0x8
+#define EXTI_FALLING_TRIGGER			0xc
+#define EXTI_RISING_FALLING_TRIGGER		0x10
+
+#define EXTI_LINE(x)	((uint32_t)0x1 << x)
+
+struct exti_regs {
+	volatile uint32_t IMR;
+	volatile uint32_t EMR;
+	volatile uint32_t RTSR;
+	volatile uint32_t FTSR;
+	volatile uint32_t SWIER;
+	volatile uint32_t PR;
+};
+
+
+#endif

include/platform/stm32f4/nvic.h

@@ -106,6 +106,7 @@ typedef enum IRQn {
 	CRYP_IRQn		= 79,	/*!< CRYP crypto global interrupt */
 	HASH_RNG_IRQn		= 80,	/*!< Hash and Rng global interrupt */
 	FPU_IRQn		= 81,	/*!< FPU global interrupt */
+	IRQn_NUM,
 } IRQn_Type;
 
 #define MAX_IRQn FPU_IRQn
@@ -268,4 +269,5 @@ inline static uint32_t NVIC_GetActive(IRQn_Type IRQn)
 	                  (1 << ((uint32_t)(IRQn) & 0x1F))) ? 1 : 0);
 }
 
+int nvic_is_setup(int irq);
 #endif /* __PLATFORM_STM32F4_NVIC_H__ */