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Fixed broken predefined macros #109

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merged 1 commit into from
Jan 31, 2024
Merged

Fixed broken predefined macros #109

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2 changes: 1 addition & 1 deletion headers/cpubenchmark.h
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Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@ inline unsigned long long rdtsc() {
static __inline__ unsigned long long startRDTSC(void) { return rdtsc(); }

static __inline__ unsigned long long stopRDTSCP(void) { return rdtsc(); }
#elif (defined(__GNUC__) && (defined(__arch64__)))
#elif (defined(__GNUC__) && (defined(__aarch64__)))
inline uint64_t rdtsc() {
uint64_t cycles;
asm volatile("mrs %0, cntvct_el0"
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4 changes: 2 additions & 2 deletions headers/simdgroupsimple.h
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Expand Up @@ -166,7 +166,7 @@ namespace FastPForLib {
_mm_storeu_si128(out++, comprBlock);
}

#elif (defined(__GNUC__) && (defined(__arch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
#elif (defined(__GNUC__) && (defined(__aarch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
inline static void comprIncompleteBlock(const uint8_t &n, const __m128i *&in,
__m128i *&out) {
// Since we have to produce exactly one compressed vector anyway, we can
Expand Down Expand Up @@ -641,7 +641,7 @@ namespace FastPForLib {
_mm_and_si128(_mm_srli_epi32(comprBlock, k * b), mask));
}

#elif (defined(__GNUC__) && (defined(__arch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
#elif (defined(__GNUC__) && (defined(__aarch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
inline static void decomprIncompleteBlock(const uint8_t &n,
const __m128i *&in,
__m128i *&out) {
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2 changes: 1 addition & 1 deletion src/simdbitpacking.cpp
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Expand Up @@ -8943,7 +8943,7 @@ static void __SIMD_fastunpack1_32(const __m128i *__restrict__ in,
_mm_storeu_si128(out++, OutReg3);
_mm_storeu_si128(out++, OutReg4);
}
#elif (defined(__GNUC__) && (defined(__arch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
#elif (defined(__GNUC__) && (defined(__aarch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
OutReg1 = _mm_and_si128(_mm_srli_epi32(InReg1, 0), mask);
OutReg2 = _mm_and_si128(_mm_srli_epi32(InReg2, 1), mask);
OutReg3 = _mm_and_si128(_mm_srli_epi32(InReg1, 2), mask);
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2 changes: 1 addition & 1 deletion src/simdunalignedbitpacking.cpp
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Expand Up @@ -8943,7 +8943,7 @@ static void __SIMD_fastunpack1_32(const __m128i *__restrict__ in,
_mm_storeu_si128(out++, OutReg3);
_mm_storeu_si128(out++, OutReg4);
}
#elif (defined(__GNUC__) && (defined(__arch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
#elif (defined(__GNUC__) && (defined(__aarch64__))) || (defined(_MSC_VER) && defined(_M_ARM64))
OutReg1 = _mm_and_si128(_mm_srli_epi32(InReg1, 0), mask);
OutReg2 = _mm_and_si128(_mm_srli_epi32(InReg2, 1), mask);
OutReg3 = _mm_and_si128(_mm_srli_epi32(InReg1, 2), mask);
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