Add the sifive_rvv configuration

[myeh01]

This PR adds a configuration called sifive_rvv to support RVV platforms beyond SiFive's x280. Essentially, the kernel code currently under sifive_x280 has been migrated to sifive_rvv, but the packm kernel and gemm and gemmtrsm microkernels have been modified slightly so that NR is defined in terms of the machine's VLEN instead of hardcoded to VLEN = 512. sifive_rvv is currently compiled with VLEN = 128 (Zvl128), the minimum VLEN required by the standard V extension, but users can modify make_defs.mk to change it to the VLEN of their target machine for potentially better performance. The sifive_x280 configuration is now defined in terms of sifive_rvv, calling the kernels from sifive_rvv and using VLEN = 512 for packm, gemm, and gemmtrsm.

This PR is based on #822.

Many thanks to Eric Love (@ericlove) and Aaron Hutchinson (@Aaron-Hutchinson) for their help with this PR.

@fgvanzee, @devinamatthews, and others, any feedback is appreciated!

[leekillough]

We should try to merge this with the rv32v and rv64v configurations. They are vector-length agnostic but only *GEMM was tuned. The rv32 and rv64 configurations are for non-vector RISC-V.