Tags: hcallahan-lowrisc/opentitan
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[Earlgrey] Silver Release v5 Silver release update with several design and DFT-related fixes.
[Earlgrey] Silver Release v4 This release builds on top of v4-rc2 and updates to the latest flash / otp wrappers. ```
[Earlgrey] Silver Release v4 rc2 Updates - Latest AST integration with updated alert interface and ast_init_done - Updated constraints for better SPI passthrough and SPI host accuracy - Various functional feature updates - Latest OTP / Flash wrappers not yet absorbed
[kmac] Let AppIntf run out of reset This commit revises entropy module to run without SW out of reset. The newly introduced AppIntf may accept the request before SW image is loaded. Then SW may not be able to trigger kmac_entropy to prepare any entropy. By creating dummy entropies in StReset state, the AppIntf can initiates the request and get the digest result. Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
[Earlgrey] Silver Release v3 Third pre-relase, containing several fixes and important infrastructural updates. In particular: - The chiplevel is now templated and the pinmux configuration and pinout can be specified with more flexibility. - Scanrole features for the pads have been added. - AST connections to the pads have been made. - The pinout has been updated from the Bronze to the Silver configuration. - The several modules have been integrated in the toplevel, including the an initial version of the ROM checker, sysrst_ctrl, adc_ctrl, PWM, spi_host.
[Earlgrey] Silver Release v2 Second pre-relase, containing several fixes. In particular: - the memory sizes have been updated in order to reflect the new bus integrity scheme. - several top-level connections have now been made, including life cycle, EDN, SRAM attributes. - several lint errors have been fixed. - the JTAG muxing feature has been moved from the top into the pinmux.
[Earlgrey] Silver Release v1 This first Silver release should be treated as a "pre-release", since several details still have to be aligned and connected. For instance: - some DFT hooks may still be missing, - SDC constraints require tuning, especially on the fast interfaces (USB, dedicated SPI), - there are several missing infrastructure connections (e.g. life cycle), - the pinout and padring are not entirely finalized, - a couple of IPs are not yet stable or even not present (e.g. SPI host), - the memory sizes have to be finalized, - and there are still several lint errors that need to be fixed. The purpose of this "pre-release" is to get PD started using the current state on master, instead of having to rely on the outdated Bronze branch.
[Earlgrey] Bronze Release v11 Revisions 1. Split OTBN DMEM into two physical regfile macros. This required a few modifications in ramgen. 2. Add release script, generate and check in golden file list. 3. Add new BIST IP and create dummy connections in flash wrapper. 4. Align OTP wrapper interface between master / bronze. 5. Carry over newer DVSim scripts to bronze. 6. Check in new SDC updated SDC file.
[Earlgrey] Bronze Release v10 Revisions 1. Minor fix to PWR sequencing signal in OTP (remove _h suffix of one signal) 2. Add prim_flop technology cell to foundry repo 3. Instantiate prim_flop in OTP wrapper for DFT tests
[Earlgrey] Bronze Release v9 Revisions 1. Fix for pattgen IRQs and portwidths 2. Multi-driven signal fix for OTP 3. Interface and shimming logic updates for OTP
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