This project provides an example of FM demodulation with AD9361, python and PYNQ. Both software and hardware implementations are explored.
- People interested in controlling SDR devices with python
- People interested in HLS development on Xilinx Zynq devices
- People interested in PYNQ for agile hardware development and verification
- ZedBoard
- xc7z020, with abundant peripherals
- AD-FMCOMMS2-EBZ
- AD-FMCOMMS2-EBZ is an evaluation board with AD9361 and an FMC connector.
ZedBoard and FMCOMMS2 can be connected together via the FMC interface.
- Vivado 2021.2
- Vitis HLS 2021.2
- PYNQ v2.4 with ADI 2019_R1 Linux kernel support
- see this repository for manuals for building the kernel
- Software implementation
- takes ~4.6s to demodulate 2.4M samples
- Hardware implementation
- takes ~321ms to demodulate 2.4M samples