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FM demodulation using python, AD9361, and PYNQ. Hardware demodulation using FPGA is explored.

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FM demodulation with AD9361, python and PYNQ


1) Introduction

This project provides an example of FM demodulation with AD9361, python and PYNQ. Both software and hardware implementations are explored.

2) Targeted Audience

  • People interested in controlling SDR devices with python
  • People interested in HLS development on Xilinx Zynq devices
  • People interested in PYNQ for agile hardware development and verification

3) Hardware Platform

  • ZedBoard
    • xc7z020, with abundant peripherals
  • AD-FMCOMMS2-EBZ
    • AD-FMCOMMS2-EBZ is an evaluation board with AD9361 and an FMC connector.

ZedBoard and FMCOMMS2 can be connected together via the FMC interface.

4) Software Platform

  • Vivado 2021.2
  • Vitis HLS 2021.2
  • PYNQ v2.4 with ADI 2019_R1 Linux kernel support

5) Performance

  • Software implementation
    • takes ~4.6s to demodulate 2.4M samples
  • Hardware implementation
    • takes ~321ms to demodulate 2.4M samples

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FM demodulation using python, AD9361, and PYNQ. Hardware demodulation using FPGA is explored.

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