Merge branch 'master' of git://88.191.163.10/u-boot-arm

Fixup an easy conflict over adding the clk_get prototype and USB_OTG
defines for am33xx having moved.

Conflicts:
	arch/arm/include/asm/arch-am33xx/hardware.h

Signed-off-by: Tom Rini <[email protected]>

.gitignore

@@ -25,7 +25,7 @@
 # Top-level generic files
 #
 
-/MLO
+/MLO*
 /SPL
 /System.map
 /u-boot

MAINTAINERS

@@ -448,6 +448,7 @@ Heiko Schocher <[email protected]>
 	cam_enc_4xx	davinci/ARM926EJS
 	charon		MPC5200
 	ids8247		MPC8247
+	ipam390		davinci/ARM926EJS
 	jupiter		MPC5200
 	kmsupx5		MPC8321
 	mucmc52		MPC5200
@@ -609,7 +610,6 @@ Jason Liu <[email protected]>
 	mx53evk         i.MX53
 	mx53loco        i.MX53
 	mx6qarm2	i.MX6Q
-	mx6qsabrelite   i.MX6Q
 
 Enric Balletbo i Serra <[email protected]>
 
@@ -952,6 +952,10 @@ Lucas Stach <[email protected]>
 
 	colibri_t20_iris	Tegra20 (ARM7 & A9 Dual Core)
 
+Antoine Tenart <[email protected]>
+
+	TI816X		ARM ARMV7 (TI816x Soc)
+
 Nick Thompson <[email protected]>
 
 	da830evm	ARM926EJS (DA830/OMAP-L137)
@@ -1075,6 +1079,7 @@ Pali Rohár <[email protected]>
 	nokia_rx51	ARM ARMV7 (OMAP34xx SoC)
 
 Eric Nelson <[email protected]>
+	mx6qsabrelite		i.MX6Q		1GB
 	nitrogen6dl		i.MX6DL		1GB
 	nitrogen6dl2g		i.MX6DL		2GB
 	nitrogen6q		i.MX6Q/6D	1GB

Makefile

@@ -322,7 +322,7 @@ LIBS-y += api/libapi.o
 LIBS-y += post/libpost.o
 LIBS-y += test/libtest.o
 
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq ($(CONFIG_OMAP_COMMON),)
 LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
 endif
 

README

@@ -2641,6 +2641,21 @@ CBFS (Coreboot Filesystem) support
 		Note: There is also a sha1sum command, which should perhaps
 		be deprecated in favour of 'hash sha1'.
 
+- Freescale i.MX specific commands:
+		CONFIG_CMD_HDMIDETECT
+		This enables 'hdmidet' command which returns true if an
+		HDMI monitor is detected.  This command is i.MX 6 specific.
+
+		CONFIG_CMD_BMODE
+		This enables the 'bmode' (bootmode) command for forcing
+		a boot from specific media.
+
+		This is useful for forcing the ROM's usb downloader to
+		activate upon a watchdog reset which is nice when iterating
+		on U-Boot.  Using the reset button or running bmode normal
+		will set it back to normal.  This command currently
+		supports i.MX53 and i.MX6.
+
 - Signing support:
 		CONFIG_RSA
 

arch/arm/config.mk

@@ -8,7 +8,7 @@
 CROSS_COMPILE ?= arm-linux-
 
 ifndef CONFIG_STANDALONE_LOAD_ADDR
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq ($(CONFIG_OMAP_COMMON),)
 CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
 else
 CONFIG_STANDALONE_LOAD_ADDR = 0xc100000

arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c

@@ -299,7 +299,11 @@ int arch_cpu_init(void)
 	 */
 	writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
 		DAVINCI_UART_PWREMU_MGMT_UTRST),
+#if (CONFIG_SYS_NS16550_COM1 == DAVINCI_UART0_BASE)
+	       &davinci_uart0_ctrl_regs->pwremu_mgmt);
+#else
 	       &davinci_uart2_ctrl_regs->pwremu_mgmt);
+#endif
 
 #if defined(CONFIG_SYS_DA850_DDR_INIT)
 	da850_ddr_setup();

arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c

@@ -28,6 +28,11 @@ const struct pinmux_config uart0_pins_txrx[] = {
 	{ pinmux(3), 2, 5 }, /* UART0_TXD */
 };
 
+const struct pinmux_config uart0_pins_rtscts[] = {
+	{ pinmux(3), 2, 6 },
+	{ pinmux(3), 2, 7 },
+};
+
 const struct pinmux_config uart1_pins_txrx[] = {
 	{ pinmux(4), 2, 6 }, /* UART1_RXD */
 	{ pinmux(4), 2, 7 }, /* UART1_TXD */
@@ -51,6 +56,7 @@ const struct pinmux_config emac_pins_rmii[] = {
 	{ pinmux(14), 8, 5 }, /* RMII_RXD[1] */
 	{ pinmux(14), 8, 6 }, /* RMII_RXD[0] */
 	{ pinmux(14), 8, 7 }, /* RMII_RXER */
+	{ pinmux(15), 0, 0 }, /* RMII_MHz_50_CLK */
 	{ pinmux(15), 8, 1 }, /* RMII_CRS_DV */
 };
 

arch/arm/cpu/armv7/Makefile

@@ -16,7 +16,7 @@ COBJS	+= cache_v7.o
 COBJS	+= cpu.o
 COBJS	+= syslib.o
 
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI814X),)
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX),)
 SOBJS	+= lowlevel_init.o
 endif
 

arch/arm/cpu/armv7/am33xx/Makefile

@@ -10,6 +10,13 @@ LIB	= $(obj)lib$(SOC).o
 
 COBJS-$(CONFIG_AM33XX)	+= clock_am33xx.o
 COBJS-$(CONFIG_TI814X)	+= clock_ti814x.o
+COBJS-$(CONFIG_AM43XX)	+= clock_am43xx.o
+
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX),)
+COBJS	+= clock.o
+endif
+
+COBJS-$(CONFIG_TI816X)	+= clock_ti816x.o
 COBJS	+= sys_info.o
 COBJS	+= mem.o
 COBJS	+= ddr.o

arch/arm/cpu/armv7/am33xx/board.c

@@ -56,12 +56,6 @@ int cpu_mmc_init(bd_t *bis)
 }
 #endif
 
-void setup_clocks_for_console(void)
-{
-	/* Not yet implemented */
-	return;
-}
-
 /* AM33XX has two MUSB controllers which can be host or gadget */
 #if (defined(CONFIG_MUSB_GADGET) || defined(CONFIG_MUSB_HOST)) && \
 	(defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1))
@@ -142,8 +136,8 @@ int arch_misc_init(void)
 	return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
-void rtc32k_enable(void)
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+static void rtc32k_enable(void)
 {
 	struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
 
@@ -159,11 +153,7 @@ void rtc32k_enable(void)
 	writel((1 << 3) | (1 << 6), &rtc->osc);
 }
 
-#define UART_RESET		(0x1 << 1)
-#define UART_CLK_RUNNING_MASK	0x1
-#define UART_SMART_IDLE_EN	(0x1 << 0x3)
-
-void uart_soft_reset(void)
+static void uart_soft_reset(void)
 {
 	struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
 	u32 regval;
@@ -180,4 +170,58 @@ void uart_soft_reset(void)
 	regval |= UART_SMART_IDLE_EN;
 	writel(regval, &uart_base->uartsyscfg);
 }
+
+static void watchdog_disable(void)
+{
+	struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
+
+	writel(0xAAAA, &wdtimer->wdtwspr);
+	while (readl(&wdtimer->wdtwwps) != 0x0)
+		;
+	writel(0x5555, &wdtimer->wdtwspr);
+	while (readl(&wdtimer->wdtwwps) != 0x0)
+		;
+}
+#endif
+
+void s_init(void)
+{
+	/*
+	 * The ROM will only have set up sufficient pinmux to allow for the
+	 * first 4KiB NOR to be read, we must finish doing what we know of
+	 * the NOR mux in this space in order to continue.
+	 */
+#ifdef CONFIG_NOR_BOOT
+	enable_norboot_pin_mux();
+#endif
+	/*
+	 * Save the boot parameters passed from romcode.
+	 * We cannot delay the saving further than this,
+	 * to prevent overwrites.
+	 */
+#ifdef CONFIG_SPL_BUILD
+	save_omap_boot_params();
+#endif
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+	watchdog_disable();
+	timer_init();
+	set_uart_mux_conf();
+	setup_clocks_for_console();
+	uart_soft_reset();
 #endif
+#ifdef CONFIG_NOR_BOOT
+	gd->baudrate = CONFIG_BAUDRATE;
+	serial_init();
+	gd->have_console = 1;
+#else
+	gd = &gdata;
+	preloader_console_init();
+#endif
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+	prcm_init();
+	set_mux_conf_regs();
+	/* Enable RTC32K clock */
+	rtc32k_enable();
+	sdram_init();
+#endif
+}