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[GSoC] Updated DC-DC Verilog Generation and Simulations #441

[GSoC] Updated DC-DC Verilog Generation and Simulations

[GSoC] Updated DC-DC Verilog Generation and Simulations #441

name: sky130hd_temp-sense-generator
on:
push:
branches:
- main
pull_request:
paths:
- 'openfasoc/common/**'
- 'openfasoc/generators/common/**'
- 'openfasoc/generators/common/temp-sense-gen/**'
workflow_dispatch:
jobs:
sky130hd_temp:
runs-on: ubuntu-latest
steps:
- name: Checkout repo
uses: actions/checkout@v2
- name: Test sky130hd Temp sensor
env:
IMAGE_NAME: msaligane/openfasoc:stable
run: |
cd $GITHUB_WORKSPACE
touch file.log
docker run --rm \
-v $PWD:$PWD\
-w $PWD\
$IMAGE_NAME\
bash -c "\
cp ./.github/scripts/parse_rpt.py ./openfasoc/generators/temp-sense-gen/. &&\
pip3 install -r requirements.txt &&\
cd ./openfasoc/generators/temp-sense-gen &&\
make sky130hd_temp &&\
python3 parse_rpt.py
"| tee -a file.log
if grep "\[ERROR\]" file.log; then exit 1; else exit 0; fi