JAGBE or Just Another GameBoy Emulator for long, is exactly what it sounds like, the goal of this emulator is to further learn how emulators work (maybe make something that will play more than tetris), and to try not to stick everything in one file.
Currently passes the following of blargg's instruction tests:
| # | name | state |
|---|---|---|
| 01 | special | ✅ |
| 02 | interrupts | ✅ |
| 03 | op sp,hl | ✅ |
| 04 | op r,imm | ✅ |
| 05 | op rp | ✅ |
| 06 | ld r,r | ✅ |
| 07 | jr,jp,call,ret,rst | ✅ |
| 08 | misc instrs | ✅ |
| 09 | op r,r | ✅ |
| 10 | bit ops | ✅ |
| 11 | op a,(hl) | ✅ |
Memory Timing:
| # | access type | state |
|---|---|---|
| 1 | read | ✅ |
| 2 | write | ✅ |
| 3 | modify | ✅ |
dmg_audio:
| # | name | state |
|---|---|---|
| 01 | registers | ❌ |
| 02 | len ctr | ❌ |
| 03 | trigger | ❌ |
| 04 | sweep | ❌ |
| 05 | sweep details | ❌ |
| 06 | overflow on trigger | ❌ |
| 07 | len sweep period sync | ❌ |
| 08 | len ctr during power | ❌ |
| 09 | wave read while on | ❌ |
| 10 | wave trigger while on | ❌ |
| 11 | regs after power | ❌ |
| 12 | wave write while on | ❌ |
| name | state |
|---|---|
| instr_timing | ✅ |
| halt_bug | ✅ |
MoonEye acceptance tests:
| test | state | comment |
|---|---|---|
| add_sp_e_timing | ✅ | |
| bits/mem_oam | ✅ | |
| bits/reg_f | ✅ | |
| bits/unused_hwio-GS | ✅ | |
| boot_regs-dmgABCX | ✅ | |
| call_cc_timing | ✅ | |
| call_cc_timing2 | ✅ | |
| call_timing | ✅ | |
| call_timing2 | ✅ | |
| di_timing-GS | ✅ | |
| div_timing | ✅ | |
| ei_sequence | ✅ | |
| ei_timing | ✅ | |
| oam_dma/basic | ✅ | |
| oam_dma/reg_read | ✅ | |
| oam_dma/sources-dmgABCXmgbS | ❌ | 'Fail: $FE00' |
| ppu/hblank_ly_scx_timing-GS | ❌ | 'Test Failed' |
| ppu/intr_1_2_timing-GS | ❌ | D incorrect. |
| ppu/intr_2_0_timing | ❌ | D,E Incorrect |
| ppu/intr_2_mode0_timing | ❌ | E Incorrect. |
| ppu/intr_2_mode0_timing_sprites | ❌ | Test #00 failed |
| ppu/intr_2_mode3_timing | ❌ | E Incorrect. |
| ppu/intr_2_oam_ok_timing | ❌ | E Incorrect. |
| ppu/lcdon_timing-dmgABCXmgbS | ❌ | Expected $01 got $00. |
| ppu/lcdon_write_timing-GS | ❌ | Expected $81 got $00. |
| ppu/stat_irq_blocking | ✅ | |
| ppu/vblank_stat_intr-GS | ❌ | D Incorrect. |
| halt_ime0_ei | ✅ | |
| halt_ime0_nointr_timing | ❌ | D Incorrect. |
| halt_ime1_timing | ✅ | |
| halt_ime1_timing2-GS | ❌ | E Incorrect. |
| if_ie_registers | ✅ | |
| intr_timing | ❌ | E Incorrect. |
| interrupts/ie_push | ✅ | |
| jp_cc_timing | ✅ | |
| jp_timing | ✅ | |
| ld_hl_sp_e_timing | ✅ | |
| oam_dma_restart | ✅ | |
| oam_dma_start | ✅ | |
| oam_dma_timing | ✅ | |
| pop_timing | ✅ | |
| push_timing | ✅ | |
| rapid_di_ei | ✅ | |
| ret_cc_timing | ✅ | |
| ret_timing | ✅ | |
| reti_intr_timing | ✅ | |
| reti_timing | ✅ | |
| rst_timing | ✅ | |
| timer/div_write | ✅ | |
| timer/rapid_toggle | ❌ | C Incorrect. |
| timer/tim00 | ✅ | |
| timer/tim00_div_trigger | ✅ | |
| timer/tim01 | ✅ | |
| timer/tim01_div_trigger | ✅ | |
| timer/tim10 | ✅ | |
| timer/tim10_div_trigger | ✅ | |
| timer/tim11 | ✅ | |
| timer/tim11_div_trigger | ✅ | |
| timer/tima_reload | ❌ | B,C Incorrect. |
| timer/tima_write_reloading | ✅ | |
| timer/tma_write_reloading | ✅ |
mooneye mbc1 tests:
| Name | Status |
|---|---|
| multicart_rom_8Mb | ❌ |
| ram_64Kb | ✅ |
| ram_256Kb | ✅ |
| rom_1Mb | ✅ |
| rom_2Mb | ✅ |
| rom_4Mb | ✅ |
| rom_8Mb | ✅ |
| rom_16Mb | ✅ |
| rom_512Kb | ✅ |