feat: add From<Vec<Registers>> for MemoryTable (#44)

Cargo.toml

@@ -36,6 +36,8 @@ default_trait_access = "allow"
 module_name_repetitions = "allow"
 
 [workspace.dependencies]
+brainfuck_vm = { path = "crates/brainfuck_vm" }
+brainfuck_prover = { path = "crates/brainfuck_prover" }
 clap = { version = "4.3.10", features = ["derive"] }
 stwo-prover = { git = "https://github.com/starkware-libs/stwo", rev = "f6214d1" }
 tracing = "0.1"

crates/brainfuck_prover/Cargo.toml

@@ -9,5 +9,6 @@ description.workspace = true
 workspace = true
 
 [dependencies]
+brainfuck_vm.workspace = true
 stwo-prover.workspace = true
 num-traits.workspace = true

crates/brainfuck_prover/src/components/memory/table.rs

@@ -1,3 +1,4 @@
+use brainfuck_vm::registers::Registers;
 use num_traits::{One, Zero};
 use stwo_prover::core::fields::m31::BaseField;
 
@@ -129,7 +130,7 @@ impl MemoryTable {
     /// Fills the jumps in `clk` with dummy rows.
     ///
     /// Required to ensure the correct sorting of the [`MemoryTable`] in the constraints.
-    pub fn complete_with_dummy_rows(&mut self) {
+    fn complete_with_dummy_rows(&mut self) {
         let mut new_table = Vec::with_capacity(self.table.len());
         let mut prev_row = self.get_row_from_index(0).unwrap();
 
@@ -150,6 +151,21 @@ impl MemoryTable {
     }
 }
 
+impl From<Vec<Registers>> for MemoryTable {
+    fn from(registers: Vec<Registers>) -> Self {
+        let mut memory_table = Self::new();
+
+        for register in registers {
+            memory_table.add_row_from_registers(register.clk, register.mp, register.mv, false);
+        }
+
+        memory_table.sort();
+        memory_table.complete_with_dummy_rows();
+
+        memory_table
+    }
+}
+
 #[cfg(test)]
 mod tests {
     use super::*;
@@ -330,4 +346,33 @@ mod tests {
 
         assert_eq!(memory_table, expected_memory_table);
     }
+
+    #[test]
+    fn test_from_registers() {
+        let reg1 = Registers::default();
+        let reg2 = Registers { clk: BaseField::one(), mp: BaseField::one(), ..Default::default() };
+        let reg3 = Registers {
+            clk: BaseField::from(5),
+            mp: BaseField::one(),
+            mv: BaseField::one(),
+            ..Default::default()
+        };
+        let registers: Vec<Registers> = vec![reg3, reg1, reg2];
+
+        let row1 = MemoryTableRow::default();
+        let row2 = MemoryTableRow::new(BaseField::one(), BaseField::one(), BaseField::zero());
+        let row3 = MemoryTableRow::new(BaseField::from(5), BaseField::one(), BaseField::one());
+
+        let mut expected_memory_table = MemoryTable::new();
+        expected_memory_table.add_rows(vec![
+            row1,
+            row2,
+            MemoryTableRow::new_dummy(BaseField::from(2), BaseField::one(), BaseField::zero()),
+            MemoryTableRow::new_dummy(BaseField::from(3), BaseField::one(), BaseField::zero()),
+            MemoryTableRow::new_dummy(BaseField::from(4), BaseField::one(), BaseField::zero()),
+            row3,
+        ]);
+
+        assert_eq!(MemoryTable::from(registers), expected_memory_table);
+    }
 }