refactor: add new ProcessorTable and update tests

kkrt-labs · Dec 11, 2024 · a5fc00d · a5fc00d
1 parent 47d2f5a
commit a5fc00d
Show file tree

Hide file tree

Showing 2 changed files with 322 additions and 69 deletions.
diff --git a/crates/brainfuck_prover/src/components/memory/table.rs b/crates/brainfuck_prover/src/components/memory/table.rs
@@ -310,7 +310,7 @@ impl From<Vec<Registers>> for MemoryIntermediateTable {
     }
 }
 
-/// Represents a single row of the [`MemoryIntermediateTable`].
+/// Represents a single entry of the [`MemoryIntermediateTable`].
 ///
 /// Represents the registers used by the Memory Table of a single step from the execution trace.
 ///
-Original file line number
+Diff line change
@@ Expand Up / @@ -310,7 +310,7 @@ impl From<Vec<Registers>> for MemoryIntermediateTable { @@
         }
     }
-    /// Represents a single row of the [`MemoryIntermediateTable`].
+    /// Represents a single entry of the [`MemoryIntermediateTable`].
     ///
     /// Represents the registers used by the Memory Table of a single step from the execution trace.
     ///
@@ Expand Down @@