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Adds fix for RMII Mode Register setting in eth config
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heythisisnate committed May 13, 2024
1 parent 6036c8a commit edc3f38
Showing 1 changed file with 39 additions and 0 deletions.
39 changes: 39 additions & 0 deletions components/modules/eth.c
Original file line number Diff line number Diff line change
Expand Up @@ -300,6 +300,45 @@ static int leth_init( lua_State *L )
if (err != ESP_OK)
goto cleanup_mac_phy;

// set RMII Mode Register on RTL8201
if (phy_type == ETH_PHY_RTL8201 && CONFIG_ETH_RMII_CLK_INPUT) {
esp_err_t err;
uint32_t phy_rmii_mode;
err = mac->write_phy_reg(mac, phy_cfg.phy_addr, 0x1f, 0x07);
if (err != ESP_OK)
return luaL_error (L, "Setting Page 7 failed");

/*
* RTL8201 RMII Mode Setting Register (RMSR)
* Page 7 Register 16
*
* bit 0 Reserved 0
* bit 1 Rg_rmii_rxdsel 1 (default)
* bit 2 Rg_rmii_rxdv_sel: 0 (default)
* bit 3 RMII Mode: 1 (RMII Mode)
* bit 4~7 Rg_rmii_rx_offset: 1111 (default)
* bit 8~11 Rg_rmii_tx_offset: 1111 (default)
* bit 12 Rg_rmii_clkdir: 1 (Input)
* bit 13~15 Reserved 000
*
* Binary: 0001 1111 1111 1010
* Hex: 0x1FFA
*
*/

err = mac->read_phy_reg(mac, phy_cfg.phy_addr, 0x10, &(phy_rmii_mode));
if (err != ESP_OK)
return luaL_error (L, "Read PHY RMSR Register failed");

err = mac->write_phy_reg(mac, phy_cfg.phy_addr, RTL8201_RMSR_REG_ADDR, 0x1FFA);
if (err != ESP_OK)
return luaL_error (L, "Setting Register 16 RMII Mode Setting failed");

err = mac->write_phy_reg(mac, phy_cfg.phy_addr, 0x1f, 0x0);
if (err != ESP_OK)
return luaL_error (L, "Setting Page 0 failed");
}

esp_netif_config_t netif_cfg = ESP_NETIF_DEFAULT_ETH();
esp_netif_t *new_eth = esp_netif_new(&netif_cfg);

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