remove unused code

hal_aarch64/src/irq.rs

@@ -184,7 +184,7 @@ impl Aarch64Irqs {
 impl IrqOps for Aarch64Irqs {
     fn init(&'static self) {
         cortex_a::registers::VBAR_EL1.set(el1_vector_table as u64);
-        unsafe { IRQS.set(self).expect("looks like init has already been called") };
+        IRQS.set(self).expect("looks like init has already been called");
     }
 
     fn init_irq_chip(&self, _allocator: &impl PageAlloc) -> Result<(), Error> {

hal_aarch64/src/mm/mod.rs

@@ -1,47 +1 @@
-use hal_core::{
-    mm::{self, PageAlloc, PageMap},
-    AddressRange, Error,
-};
-
 pub mod pgt48;
-
-use pgt48::PageTable;
-
-pub type EntryType = usize;
-
-pub const PAGE_SIZE: usize = PageTable::PAGE_SIZE;
-
-use core::cell::OnceCell;
-
-static mut GPT: OnceCell<&'static mut PageTable> = OnceCell::new();
-
-pub fn is_pagetable_installed() -> bool {
-    unsafe { GPT.get_mut().is_some() }
-}
-
-pub fn prefill_pagetable(
-    r: impl Iterator<Item = AddressRange>,
-    rw: impl Iterator<Item = AddressRange>,
-    rwx: impl Iterator<Item = AddressRange>,
-    pre_allocated: impl Iterator<Item = AddressRange>,
-    allocator: &impl PageAlloc,
-) -> Result<(), Error> {
-    let pt = hal_core::mm::prefill_pagetable::<PageTable>(r, rw, rwx, pre_allocated, allocator)?;
-
-    // TODO: put into into the hal_core::Error
-    unsafe {
-        if GPT.set(pt).is_err() {
-            panic!("GPT is already set ?");
-        }
-    };
-
-    Ok(())
-}
-
-pub fn align_up(addr: usize) -> usize {
-    mm::align_up(addr, PAGE_SIZE)
-}
-
-pub fn align_down(addr: usize) -> usize {
-    mm::align_down(addr, PAGE_SIZE)
-}

hal_riscv64/src/irq.rs

@@ -1,16 +1,14 @@
 use hal_core::{
-    mm::{PageAlloc, PageMap, Permissions, VAddr},
+    mm::PageAlloc,
     Error, TimerCallbackFn,
     IrqOps,
     once_lock::OnceLock,
 };
 
 use log;
 
-use super::mm;
 use super::plic::Plic;
 use super::registers;
-use super::cpu;
 
 use core::arch::asm;
 use core::ptr;
@@ -21,6 +19,7 @@ use sbi;
 
 static IRQS: OnceLock<&Riscv64Irqs> = OnceLock::new();
 
+#[derive(Debug)]
 pub struct Riscv64Irqs {
     irq_chip: OnceLock<Plic>,
     timer_callback: AtomicPtr<TimerCallbackFn>,
@@ -31,17 +30,20 @@ unsafe impl Sync for Riscv64Irqs {}
 impl IrqOps for Riscv64Irqs {
     fn init(&'static self) {
         registers::set_stvec(asm_trap_handler as usize);
-        IRQS.set(self);
+        IRQS.set(self).expect("Looks like Riscv64Irqs::init has already been called, must only be called once !");
     }
 
     fn unmask_interrupts(&self) {
-        cpu::unmask_interrupts();
+        registers::set_sstatus_sie();
+        registers::set_sie_ssie();
+        registers::set_sie_seie();
+        registers::set_sie_stie();
     }
 
 
     fn init_irq_chip(&self, _allocator: &impl PageAlloc) -> Result<(), Error> {
         let base = 0xc000000;
-        self.irq_chip.set(Plic::new(base));
+        self.irq_chip.set(Plic::new(base)).expect("Riscv64Irqs has already been called");
 
         Ok(())
     }
@@ -91,7 +93,6 @@ impl Riscv64Irqs {
             e => panic!("getting caught by unhandler exception {:?}", e),
         }
     }
-
 }
 
 #[derive(Debug, Copy, Clone)]

hal_riscv64/src/lib.rs

@@ -2,7 +2,6 @@
 #![feature(fn_align)]
 #![feature(naked_functions)]
 
-pub mod cpu;
 pub mod irq;
 pub mod mm;
 mod plic;

hal_riscv64/src/mm/mod.rs

@@ -1,44 +1 @@
-use core::arch::asm;
-use core::cell::OnceCell;
-use hal_core::{
-    mm::{self, PageAlloc, PageMap},
-    AddressRange, Error,
-};
-
 pub mod sv39;
-use sv39::{PageTable, Satp, SatpMode};
-
-pub const PAGE_SIZE: usize = PageTable::PAGE_SIZE;
-
-static mut GPT: OnceCell<&'static mut PageTable> = OnceCell::new();
-
-pub fn current() -> &'static mut PageTable {
-    unsafe { GPT.get_mut().unwrap() }
-}
-
-pub fn prefill_pagetable(
-    r: impl Iterator<Item = AddressRange>,
-    rw: impl Iterator<Item = AddressRange>,
-    rwx: impl Iterator<Item = AddressRange>,
-    pre_allocated: impl Iterator<Item = AddressRange>,
-    allocator: &impl PageAlloc,
-) -> Result<(), Error> {
-    let pt = hal_core::mm::prefill_pagetable::<PageTable>(r, rw, rwx, pre_allocated, allocator)?;
-
-    // TODO: put into into the hal_core::Error
-    unsafe {
-        if GPT.set(pt).is_err() {
-            panic!("GPT is already set ?");
-        }
-    };
-
-    Ok(())
-}
-
-pub fn align_down(addr: usize) -> usize {
-    mm::align_down(addr, PageTable::PAGE_SIZE)
-}
-
-pub fn align_up(addr: usize) -> usize {
-    mm::align_up(addr, PageTable::PAGE_SIZE)
-}

hal_riscv64/src/plic.rs

@@ -9,6 +9,7 @@ const PLIC_NUMBER_SOURCE_REGISTER: u16 =
 const PLIC_MAX_CONTEXT: u16 = 0x3e00;
 const PLIC_CLAIM_OFFSET: usize = 0x201004;
 
+#[derive(Debug)]
 pub struct Plic {
     base_register_address: usize,
 }