Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[CIR][CIRGen][Builtin][Neon] Lower neon_vrshl_v and neon_vrshlq_v #1151

Merged
merged 1 commit into from
Nov 25, 2024

Conversation

ghehg
Copy link
Collaborator

@ghehg ghehg commented Nov 21, 2024

They are rounding shift of vectors, and shift amount is from the least significant byte of the corresponding element of the second input vector. Thus, it is implemented in its own ASM . These make them not suitable to be lowered to CIR ShiftOp though it supports vector type now.

@bcardosolopes bcardosolopes merged commit 96dd61c into llvm:main Nov 25, 2024
6 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants