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Update tt_um_Digi_OTA_.v
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maquinadefuego919 authored Oct 15, 2024
1 parent 4260c79 commit 3305e11
Showing 1 changed file with 3 additions and 2 deletions.
5 changes: 3 additions & 2 deletions src/tt_um_Digi_OTA_.v
Original file line number Diff line number Diff line change
Expand Up @@ -19,8 +19,9 @@ module tt_um_Digi_OTA_ (
input wire clk, // clock
input wire rst_n // reset_n - low to reset
);
wire vss=VDPWR;

//wire vss=VDPWR;
.VDD(VDPWR),
.VSS(VGND),
wire Vip, Vin, Out;

assign Vip = ua[0];
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