An experiment in RISC-V, powered by (to my knowledge) the only easily purchasable RISC-V chip at the moment, the SiFive FE310-G000. It is an odd and clearly somewhat experimental chip in its own right, but it is plenty good enough for the puposes of this little project.
See the LICENSE file for full details.
Copyright 2018 nmrossomando
Licensed under the Apache License, Version 2.0 (the "License"); you may not use this design except in compliance with the License. You may obtain a copy of the License here or in the LICENSE file of this repository.
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed in an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the license.