Skip to content

Commit

Permalink
Merged PR 118720: WDT in top-level UVM
Browse files Browse the repository at this point in the history
UVM updates and sequence to:
1. Enable WDT in cascade mode with default timeout values during ROM execution
2. Test cascade mode (with t1 timeout) and independent mode randomly during runtime

TODO:
1. Test t2 expiry in cascade mode which triggers NMI (test hangs due to RDC issues when a reset is issued to service the NMI)

Related work items: #468167, #468170
  • Loading branch information
upadhyayulakiran authored and Anjana Parthasarathy committed Aug 14, 2023
1 parent 64a9993 commit 1ce58e6
Show file tree
Hide file tree
Showing 15 changed files with 746 additions and 16 deletions.
27 changes: 20 additions & 7 deletions src/integration/tb/caliptra_top_tb_services.sv
Original file line number Diff line number Diff line change
Expand Up @@ -246,6 +246,7 @@ module caliptra_top_tb_services
// 8'he7 - Reset mailbox out-of-order flag when non-fatal error is masked (allows the test to continue)
// 8'he8 - Enable scan mode when DOE fsm transitions to done state
// 8'he9 - Force dmi_reg_en input to clk gate to emulate JTAG accesses
// 8'hea - Set random values to WDT timer1 and timer2
// 8'heb - Inject fatal error
// 8'hec - Inject randomized UDS test vector
// 8'hed - Inject randomized FE test vector
Expand Down Expand Up @@ -832,11 +833,13 @@ endgenerate //IV_NO
set_wdt_timer2_period <= 'b0;
end
else begin
if(caliptra_top_dut.soc_ifc_top1.i_wdt.wdt_timer1_timeout_serviced) begin
set_wdt_timer1_period <= 'b1;
end
if(caliptra_top_dut.soc_ifc_top1.i_wdt.wdt_timer2_timeout_serviced) begin
set_wdt_timer2_period <= 'b1;
if (!UVM_TB) begin
if(caliptra_top_dut.soc_ifc_top1.i_wdt.wdt_timer1_timeout_serviced) begin
set_wdt_timer1_period <= 'b1;
end
if(caliptra_top_dut.soc_ifc_top1.i_wdt.wdt_timer2_timeout_serviced) begin
set_wdt_timer2_period <= 'b1;
end
end
if(reset_wdt_timer_period) begin
set_wdt_timer1_period <= 'b0;
Expand All @@ -849,15 +852,25 @@ endgenerate //IV_NO
if(set_wdt_timer1_period) begin
force caliptra_top_dut.soc_ifc_top1.timer1_timeout_period = 64'hFFFFFFFF_FFFFFFFF;
end
else begin
else if(reset_wdt_timer_period) begin
release caliptra_top_dut.soc_ifc_top1.timer1_timeout_period;
end

if(set_wdt_timer2_period) begin
force caliptra_top_dut.soc_ifc_top1.timer2_timeout_period = 64'hFFFFFFFF_FFFFFFFF;
end
else begin
else if(reset_wdt_timer_period) begin
release caliptra_top_dut.soc_ifc_top1.timer2_timeout_period;
end

end

always @(negedge clk) begin
if((WriteData[7:0] == 8'hea) && mailbox_write) begin
force caliptra_top_dut.soc_ifc_top1.timer1_timeout_period = {32'h0000_0000, $urandom_range(32'h0000_0001,32'h0000_0FFF)};
force caliptra_top_dut.soc_ifc_top1.timer2_timeout_period = {32'h0000_0000, $urandom_range(32'h0000_0001,32'h0000_0FFF)};
end
//Use 'hF1 code to reset these values in the test
end


Expand Down
8 changes: 8 additions & 0 deletions src/integration/test_suites/caliptra_fmc/caliptra_isr.h
Original file line number Diff line number Diff line change
Expand Up @@ -185,6 +185,14 @@ inline void service_soc_ifc_error_intr() {
*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK;
cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK;
}
if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER1_TIMEOUT_STS_MASK) {
*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER1_TIMEOUT_STS_MASK;
cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER1_TIMEOUT_STS_MASK;
}
if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER2_TIMEOUT_STS_MASK) {
*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER2_TIMEOUT_STS_MASK;
cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER2_TIMEOUT_STS_MASK;
}
if (sts == 0) {
VPRINTF(ERROR,"bad soc_ifc_error_intr sts:%x\n", sts);
SEND_STDOUT_CTRL(0x1);
Expand Down
49 changes: 49 additions & 0 deletions src/integration/test_suites/caliptra_rt/caliptra_rt.c
Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,12 @@ void nmi_handler() {
SEND_STDOUT_CTRL(0x1);
}
}
else {
VPRINTF(LOW, "In NMI handler\n");
if (lsu_read_32(CLP_SOC_IFC_REG_CPTRA_HW_ERROR_FATAL) & SOC_IFC_REG_CPTRA_HW_ERROR_FATAL_NMI_PIN_MASK)
VPRINTF(LOW, "Saw hw_error_fatal.nmi_pin assertion\n");
while(1);
}
}

void caliptra_rt() {
Expand All @@ -107,6 +113,12 @@ void caliptra_rt() {
uint32_t loop_iter;
uint32_t temp; // multi-purpose variable

//WDT vars
int i;
int wdt_rand_t1_val;
int wdt_rand_t2_val;
int mode;

VPRINTF(MEDIUM, "----------------------------------\n");
VPRINTF(LOW, "- Caliptra Validation RT!!\n" );
VPRINTF(MEDIUM, "----------------------------------\n");
Expand All @@ -117,6 +129,43 @@ void caliptra_rt() {
// Runtime flow -- set ready for RT
soc_ifc_set_flow_status_field(SOC_IFC_REG_CPTRA_FLOW_STATUS_READY_FOR_RUNTIME_MASK);

VPRINTF(LOW, "Enabling WDT intr\n");
lsu_write_32(CLP_SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R, SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R_ERROR_WDT_TIMER1_TIMEOUT_EN_MASK | SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTR_EN_R_ERROR_WDT_TIMER2_TIMEOUT_EN_MASK);

wdt_rand_t1_val = rand() % 0xfff;
wdt_rand_t2_val = rand() % 0xfff;
mode = rand() % 2; //0 - independent mode, 1 - cascade mode
if (mode){
VPRINTF(LOW, "Restarting WDT in cascade mode (only t1 timeout)\n");
//TODO also add t2 timeout (NMI event)
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_EN, SOC_IFC_REG_CPTRA_WDT_TIMER1_EN_TIMER1_EN_MASK);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_TIMEOUT_PERIOD_0, wdt_rand_t1_val);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_TIMEOUT_PERIOD_1, 0x00000000);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_CTRL, SOC_IFC_REG_CPTRA_WDT_TIMER1_CTRL_TIMER1_RESTART_MASK);
}
else {
VPRINTF(LOW, "Restarting WDT in independent mode\n");
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_EN, SOC_IFC_REG_CPTRA_WDT_TIMER1_EN_TIMER1_EN_MASK);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_TIMEOUT_PERIOD_0, wdt_rand_t1_val);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_TIMEOUT_PERIOD_1, 0x00000000);

lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER2_EN, SOC_IFC_REG_CPTRA_WDT_TIMER2_EN_TIMER2_EN_MASK);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER2_TIMEOUT_PERIOD_0, wdt_rand_t2_val);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER2_TIMEOUT_PERIOD_1, 0x00000000);

lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_CTRL, SOC_IFC_REG_CPTRA_WDT_TIMER1_CTRL_TIMER1_RESTART_MASK);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER2_CTRL, SOC_IFC_REG_CPTRA_WDT_TIMER2_CTRL_TIMER2_RESTART_MASK);

while (!(lsu_read_32(CLP_SOC_IFC_REG_CPTRA_WDT_STATUS) & SOC_IFC_REG_CPTRA_WDT_STATUS_T1_TIMEOUT_MASK));
//Reset timer period to avoid hangs in test
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_TIMEOUT_PERIOD_0, 0xffffffff);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_TIMEOUT_PERIOD_1, 0xffffffff);

while (!(lsu_read_32(CLP_SOC_IFC_REG_CPTRA_WDT_STATUS) & SOC_IFC_REG_CPTRA_WDT_STATUS_T2_TIMEOUT_MASK));
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER2_TIMEOUT_PERIOD_0, 0xffffffff);
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER2_TIMEOUT_PERIOD_1, 0xffffffff);

}
// Initialization
init_interrupts();

Expand Down
8 changes: 8 additions & 0 deletions src/integration/test_suites/caliptra_top/caliptra_isr.h
Original file line number Diff line number Diff line change
Expand Up @@ -185,6 +185,14 @@ inline void service_soc_ifc_error_intr() {
*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK;
cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK;
}
if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER1_TIMEOUT_STS_MASK) {
*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER1_TIMEOUT_STS_MASK;
cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER1_TIMEOUT_STS_MASK;
}
if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER2_TIMEOUT_STS_MASK) {
*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER2_TIMEOUT_STS_MASK;
cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_WDT_TIMER2_TIMEOUT_STS_MASK;
}
if (sts == 0) {
VPRINTF(ERROR,"bad soc_ifc_error_intr sts:%x\n", sts);
SEND_STDOUT_CTRL(0x1);
Expand Down
2 changes: 2 additions & 0 deletions src/integration/test_suites/caliptra_top/caliptra_top.c
Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,8 @@ void main() {
VPRINTF(MEDIUM, "----------------------------------\n");

// TODO other init tasks? (interrupts later)
VPRINTF(LOW, "Starting WDT in cascade mode\n");
lsu_write_32(CLP_SOC_IFC_REG_CPTRA_WDT_TIMER1_EN, SOC_IFC_REG_CPTRA_WDT_TIMER1_EN_TIMER1_EN_MASK);

//Check the reset reason FIXME (as soc_ifc fn)
reset_reason = lsu_read_32(CLP_SOC_IFC_REG_CPTRA_RESET_REASON);
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -72,6 +72,7 @@ package caliptra_top_sequences_pkg;
`include "src/caliptra_top_rand_sequence.svh"
`include "src/caliptra_top_cmdline_sequence.svh"
`include "src/caliptra_top_rom_sequence.svh"
`include "src/caliptra_top_wdt_sequence.svh"
// pragma uvmf custom package_item_additional end

endpackage
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,179 @@
//----------------------------------------------------------------------
// Created with uvmf_gen version 2022.3
//----------------------------------------------------------------------
// SPDX-License-Identifier: Apache-2.0
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

// pragma uvmf custom header begin
// pragma uvmf custom header end
//----------------------------------------------------------------------
//
//----------------------------------------------------------------------
//
// DESCRIPTION: This file contains the top level sequence used in caliptra_top_wdt_test.
//
//----------------------------------------------------------------------
//----------------------------------------------------------------------
//

class caliptra_top_wdt_sequence extends caliptra_top_bench_sequence_base;

`uvm_object_utils( caliptra_top_wdt_sequence );

rand soc_ifc_env_bringup_sequence_t soc_ifc_env_bringup_seq;
rand soc_ifc_env_pauser_init_sequence_t soc_ifc_env_pauser_init_seq;
rand soc_ifc_env_mbox_real_fw_sequence_t soc_ifc_env_mbox_fmc_seq;
rand soc_ifc_env_mbox_real_fw_sequence_t soc_ifc_env_mbox_rt_seq;
rand soc_ifc_env_reset_warm_sequence_t soc_ifc_env_reset_warm_seq;
rand soc_ifc_env_reset_cold_sequence_t soc_ifc_env_reset_cold_seq;
// Local handle to register model for convenience
soc_ifc_reg_model_top reg_model;


rand int iteration_count;
int sts_rsp_count = 0;
int rsp_count = 0;


function new(string name = "" );
super.new(name);
reg_model = top_configuration.soc_ifc_subenv_config.soc_ifc_rm;
endfunction

// ****************************************************************************
virtual task run_firmware_init(soc_ifc_env_mbox_real_fw_sequence_t fmc_seq, soc_ifc_env_mbox_real_fw_sequence_t rt_seq);
bit ready_for_fw = 0;
bit ready_for_rt = 0;
while (!ready_for_fw) begin
while(!sts_rsp_count)soc_ifc_subenv_soc_ifc_ctrl_agent_config.wait_for_num_clocks(1); // Wait for new status updates
`uvm_info("CALIPTRA_TOP_WDT_TEST", "Observed status response, checking contents", UVM_DEBUG)
sts_rsp_count = 0; // We only care about the latest rsp, so even if count > 1, reset back to 0
ready_for_fw = soc_ifc_subenv_soc_ifc_status_agent_responder_seq.rsp.ready_for_fw_push;
end
if (!fmc_seq.randomize() with { fmc_seq.mbox_op_rand.cmd == mbox_cmd_e'(MBOX_CMD_FMC_UPDATE); })
`uvm_fatal("CALIPTRA_TOP_WDT_TEST", "caliptra_top_wdt_sequence::body() - fmc_seq randomization failed")
fmc_seq.start(top_configuration.soc_ifc_subenv_config.vsqr);
if (!rt_seq.randomize() with { rt_seq.mbox_op_rand.cmd == mbox_cmd_e'(MBOX_CMD_RT_UPDATE); })
`uvm_fatal("CALIPTRA_TOP_WDT_TEST", "caliptra_top_wdt_sequence::body() - rt_seq randomization failed")
rt_seq.start(top_configuration.soc_ifc_subenv_config.vsqr);

// Wait for RT image to set the ready_for_rt bit
while (!ready_for_rt) begin
while(!sts_rsp_count)soc_ifc_subenv_soc_ifc_ctrl_agent_config.wait_for_num_clocks(1); // Wait for new status updates
`uvm_info("CALIPTRA_TOP_WDT_TEST", "Observed status response, checking contents", UVM_DEBUG)
sts_rsp_count = 0; // We only care about the latest rsp, so even if count > 1, reset back to 0
ready_for_rt = soc_ifc_subenv_soc_ifc_status_agent_responder_seq.rsp.ready_for_runtime;
end
endtask

// ****************************************************************************
virtual task body();
// pragma uvmf custom body begin
// Construct sequences here
bit pauser_valid_initialized = 1'b0;
uvm_object obj;
int ii;
bit nmi_intr;
bit hw_error_fatal;
uvm_status_e reg_sts;
uvm_reg_data_t wdt_status_data;

caliptra_top_env_seq = caliptra_top_env_sequence_base_t::type_id::create("caliptra_top_env_seq");
soc_ifc_env_bringup_seq = soc_ifc_env_bringup_sequence_t::type_id::create("soc_ifc_env_bringup_seq");
soc_ifc_env_pauser_init_seq = soc_ifc_env_pauser_init_sequence_t::type_id::create("soc_ifc_env_pauser_init_seq");
soc_ifc_env_mbox_fmc_seq = soc_ifc_env_mbox_real_fw_sequence_t::type_id::create("soc_ifc_env_mbox_fmc_seq");
soc_ifc_env_mbox_rt_seq = soc_ifc_env_mbox_real_fw_sequence_t::type_id::create("soc_ifc_env_mbox_rt_seq");
soc_ifc_env_reset_warm_seq = soc_ifc_env_reset_warm_sequence_t::type_id::create("soc_ifc_env_reset_warm_seq");
soc_ifc_env_reset_cold_seq = soc_ifc_env_reset_cold_sequence_t::type_id::create("soc_ifc_env_reset_cold_seq");

soc_ifc_subenv_soc_ifc_ctrl_agent_random_seq = soc_ifc_subenv_soc_ifc_ctrl_agent_random_seq_t::type_id::create("soc_ifc_subenv_soc_ifc_ctrl_agent_random_seq");
soc_ifc_subenv_soc_ifc_status_agent_responder_seq = soc_ifc_subenv_soc_ifc_status_agent_responder_seq_t::type_id::create("soc_ifc_subenv_soc_ifc_status_agent_responder_seq");
soc_ifc_subenv_mbox_sram_agent_responder_seq = soc_ifc_subenv_mbox_sram_agent_responder_seq_t::type_id::create("soc_ifc_subenv_mbox_sram_agent_responder_seq");

// Handle to the responder sequence for getting response transactions
soc_ifc_env_bringup_seq.soc_ifc_status_agent_rsp_seq = soc_ifc_subenv_soc_ifc_status_agent_responder_seq;
soc_ifc_env_pauser_init_seq.soc_ifc_status_agent_rsp_seq = soc_ifc_subenv_soc_ifc_status_agent_responder_seq;
soc_ifc_env_mbox_fmc_seq.soc_ifc_status_agent_rsp_seq = soc_ifc_subenv_soc_ifc_status_agent_responder_seq;
soc_ifc_env_mbox_rt_seq.soc_ifc_status_agent_rsp_seq = soc_ifc_subenv_soc_ifc_status_agent_responder_seq;
soc_ifc_env_reset_warm_seq.soc_ifc_status_agent_rsp_seq = soc_ifc_subenv_soc_ifc_status_agent_responder_seq;
soc_ifc_env_reset_cold_seq.soc_ifc_status_agent_rsp_seq = soc_ifc_subenv_soc_ifc_status_agent_responder_seq;

reg_model.reset();
// Start RESPONDER sequences here
fork
soc_ifc_subenv_soc_ifc_status_agent_responder_seq.start(soc_ifc_subenv_soc_ifc_status_agent_sequencer);
soc_ifc_subenv_mbox_sram_agent_responder_seq.start(soc_ifc_subenv_mbox_sram_agent_sequencer);
join_none

fork
forever @(soc_ifc_subenv_soc_ifc_status_agent_responder_seq.new_rsp) begin
sts_rsp_count++;
rsp_count++;
end
join_none

if(!soc_ifc_env_bringup_seq.randomize())
`uvm_fatal("CALIPTRA_TOP_WDT_TEST", "caliptra_top_wdt_sequence::body() - soc_ifc_env_bringup_seq randomization failed")
soc_ifc_env_bringup_seq.start(top_configuration.soc_ifc_subenv_config.vsqr);

`uvm_info("CALIPTRA_TOP_BRINGUP", "SoC completed poweron and observed reset deassertion to system", UVM_LOW)

run_firmware_init(soc_ifc_env_mbox_fmc_seq,soc_ifc_env_mbox_rt_seq);

// //--------------------------------
// //Wait for NMI to occur - TODO
// `uvm_info("KNU", $sformatf("FW init done, hw_error_fatal = %0d", hw_error_fatal),UVM_MEDIUM);
// while (!hw_error_fatal) begin
// `uvm_info("KNU", "Inside while loop",UVM_MEDIUM);
// while(!rsp_count)soc_ifc_subenv_soc_ifc_ctrl_agent_config.wait_for_num_clocks(1); // Wait for new status updates
// `uvm_info("CALIPTRA_TOP_WDT_TEST", "Observed status response, checking contents", UVM_MEDIUM)
// `uvm_info("CALIPTRA_TOP_WDT_TEST", soc_ifc_subenv_soc_ifc_status_agent_responder_seq.rsp.convert2string(), UVM_MEDIUM)
// // `uvm_info("CALIPTRA_TOP_WDT_TEST", $sformatf("response error fatal = %0d",soc_ifc_subenv_soc_ifc_status_agent_responder_seq.rsp.cptra_error_fatal_intr_pending), UVM_MEDIUM)
// rsp_count = 0; // We only care about the latest rsp, so even if count > 1, reset back to 0
// hw_error_fatal = soc_ifc_subenv_soc_ifc_status_agent_responder_seq.rsp.cptra_error_fatal_intr_pending;
// end
// `uvm_info("KNU", $sformatf("Outside while loop, hw_error_fatal = %h", hw_error_fatal),UVM_MEDIUM);

// // //TODO: add APB seq to read hw_error_fatal reg to see if it's NMI or not
// `uvm_info("CALIPTRA_TOP_WDT_TEST", "Encountered NMI, issuing reset", UVM_MEDIUM);
// //soc_ifc_env_bringup_seq.start(top_configuration.soc_ifc_subenv_config.vsqr);
// reg_model.reset(); //TODO needed?
// // if (!soc_ifc_env_reset_cold_seq.randomize())
// // `uvm_fatal("CALIPTRA_TOP_WDT_TEST", "caliptra_top_wdt_sequence::body() - soc_ifc_env_bringup_seq randomization failed")
// // soc_ifc_env_reset_cold_seq.start(top_configuration.soc_ifc_subenv_config.vsqr);
// // reg_model.reset(); //TODO needed?
// if(!soc_ifc_env_bringup_seq.randomize())
// `uvm_fatal("CALIPTRA_TOP_WDT_TEST", "caliptra_top_wdt_sequence::body() - soc_ifc_env_bringup_seq randomization failed")
// soc_ifc_env_bringup_seq.start(top_configuration.soc_ifc_subenv_config.vsqr);
//--------------------------------

// UVMF_CHANGE_ME : Extend the simulation XXX number of clocks after
// the last sequence to allow for the last sequence item to flow
// through the design.
fork
soc_ifc_subenv_soc_ifc_ctrl_agent_config.wait_for_num_clocks(10000);
soc_ifc_subenv_cptra_ctrl_agent_config.wait_for_num_clocks(10000);
soc_ifc_subenv_soc_ifc_status_agent_config.wait_for_num_clocks(10000);
soc_ifc_subenv_cptra_status_agent_config.wait_for_num_clocks(10000);
soc_ifc_subenv_mbox_sram_agent_config.wait_for_num_clocks(10000);
join

// pragma uvmf custom body end
endtask

endclass

// pragma uvmf custom external begin
// pragma uvmf custom external end

Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@ package caliptra_top_tests_pkg;
`include "src/register_test.svh"
`include "src/example_derived_test.svh"
`include "src/caliptra_top_rand_test.svh"
`include "src/caliptra_top_wdt_test.svh"
`include "src/caliptra_top_cmdline_test.svh"
`include "src/caliptra_top_rom_test.svh"

Expand Down
Loading

0 comments on commit 1ce58e6

Please sign in to comment.