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Merged PR 117393: FIPS SOC register updates
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1. Add hwclr to TRNG data registers via TRNG ctrl reg
2. Separate HW_REV_ID into two fields - Caliptra gen ID, SoC stepping ID (updated via a fuse reg)

Related work items: #517473, #517474
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@upadhyayulakiran
upadhyayulakiran authored and Anjana Parthasarathy committed Jul 26, 2023
1 parent b0fceeb commit 65d9934
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Showing 18 changed files with 949 additions and 425 deletions.
112 changes: 62 additions & 50 deletions src/integration/rtl/caliptra_reg.h
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112 changes: 62 additions & 50 deletions src/integration/rtl/caliptra_reg_defines.svh
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23 changes: 22 additions & 1 deletion src/integration/tb/caliptra_top_tb.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -73,6 +73,7 @@ module caliptra_top_tb (
S_APB_IDLE,
S_APB_WR_UDS,
S_APB_WR_FE,
S_APB_WR_SOC_STEPPING_ID,
S_APB_WR_FUSE_DONE,
S_APB_POLL_FLOW_ST,
S_APB_WR_BOOT_GO,
Expand Down Expand Up @@ -493,6 +494,9 @@ module caliptra_top_tb (
S_APB_WR_FE: begin
$display ("SoC: Writing obfuscated Field Entropy to fuse bank\n");
end
S_APB_WR_SOC_STEPPING_ID: begin
$display ("SoC: Writing SOC Stepping ID to fuse bank\n");
end
S_APB_WR_FUSE_DONE: begin
$display ("SoC: Writing fuse done register\n");
end
Expand Down Expand Up @@ -587,7 +591,7 @@ module caliptra_top_tb (
end
S_APB_WR_FE: begin
if (apb_xfer_end && apb_wr_count == (`CLP_OBF_FE_DWORDS-1)) begin
n_state_apb = S_APB_WR_FUSE_DONE;
n_state_apb = S_APB_WR_SOC_STEPPING_ID;
apb_wr_count_nxt = '0;
end
else if (apb_xfer_end) begin
Expand All @@ -599,6 +603,14 @@ module caliptra_top_tb (
apb_wr_count_nxt = apb_wr_count;
end
end
S_APB_WR_SOC_STEPPING_ID: begin
if (apb_xfer_end) begin
n_state_apb = S_APB_WR_FUSE_DONE;
end
else begin
n_state_apb = S_APB_WR_SOC_STEPPING_ID;
end
end
//set fuse done
S_APB_WR_FUSE_DONE: begin
if (apb_xfer_end) begin
Expand Down Expand Up @@ -833,6 +845,10 @@ module caliptra_top_tb (
PADDR = `CLP_SOC_IFC_REG_FUSE_FIELD_ENTROPY_0 + 4 * apb_wr_count;
PWDATA = cptra_fe_tb[apb_wr_count];
end
S_APB_WR_SOC_STEPPING_ID: begin
PADDR = `CLP_SOC_IFC_REG_FUSE_SOC_STEPPING_ID;
PWDATA = {16'h0, 16'h1357};
end
S_APB_WR_FUSE_DONE: begin
PADDR = `CLP_SOC_IFC_REG_CPTRA_FUSE_WR_DONE;
PWDATA = 32'h00000001;
Expand Down Expand Up @@ -925,6 +941,11 @@ module caliptra_top_tb (
PWRITE = 1;
PAUSER = 0;
end
S_APB_WR_SOC_STEPPING_ID: begin
PSEL = 1;
PWRITE = 1;
PAUSER = 0;
end
S_APB_WR_FUSE_DONE: begin
PSEL = 1;
PWRITE = 1;
Expand Down
112 changes: 62 additions & 50 deletions src/soc_ifc/rtl/caliptra_top_reg.h
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112 changes: 62 additions & 50 deletions src/soc_ifc/rtl/caliptra_top_reg_defines.svh
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13 changes: 11 additions & 2 deletions src/soc_ifc/rtl/soc_ifc_external_reg.rdl
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Original file line number Diff line number Diff line change
Expand Up @@ -172,9 +172,17 @@ reg {
desc = "Storage for the requested TRNG Data.
[br]Caliptra Access: RO
[br]SOC Access: RW";
field {sw=rw; hw=na; swwe; swacc; resetsignal=cptra_rst_b;} DATA[32]=0;
field {sw=rw; hw=na; swwe; swacc; hwclr; resetsignal=cptra_rst_b;} DATA[32]=0;
} CPTRA_TRNG_DATA[12];

reg {
name = "TRNG Ctrl";
desc = "TRNG Control register to clear data registers";
field {desc = "Indicates that TRNG Data can be cleared
[br]Caliptra Access: RW
[br]SOC Access: RO"; sw=rw; hw=r; singlepulse; swwel=soc_req; resetsignal=cptra_rst_b;} clear=0;
} CPTRA_TRNG_CTRL;

reg {
name = "TRNG Status";
desc = "TRNG Status register to indicate request and done";
Expand Down Expand Up @@ -251,7 +259,8 @@ reg {
desc = "Caliptra HW revision ID that matches the official final release milestone
[br]Caliptra Access: RO
[br]SOC Access: RO";
field {sw=r; hw=r; resetsignal = cptra_rst_b;} REV_ID[32]=1;
field {sw=r; resetsignal = cptra_rst_b;} CPTRA_GENERATION[16]=1;
field {sw=r; hw=w; resetsignal = cptra_rst_b;} SOC_STEPPING_ID[16]=0;
} CPTRA_HW_REV_ID;
reg {
name = "Caliptra FW RevID";
Expand Down
7 changes: 6 additions & 1 deletion src/soc_ifc/rtl/soc_ifc_fuse_reg.rdl
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Original file line number Diff line number Diff line change
Expand Up @@ -100,5 +100,10 @@ reg {
[br]SOC Access: RWL-S";
Fuse lms_revocation[32]=0;
} fuse_lms_revocation;

reg {
desc = "SOC stepping ID
[br]Caliptra Access: RO
[br]SOC Access: RWL-S";
Fuse soc_stepping_id[16]=0;
} fuse_soc_stepping_id;

432 changes: 253 additions & 179 deletions src/soc_ifc/rtl/soc_ifc_reg.sv
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46 changes: 44 additions & 2 deletions src/soc_ifc/rtl/soc_ifc_reg_covergroups.svh
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Original file line number Diff line number Diff line change
Expand Up @@ -375,6 +375,26 @@

endgroup

/*----------------------- SOC_IFC_REG__CPTRA_TRNG_CTRL COVERGROUPS -----------------------*/
covergroup soc_ifc_reg__CPTRA_TRNG_CTRL_bit_cg with function sample(input bit reg_bit);
option.per_instance = 1;
reg_bit_cp : coverpoint reg_bit {
bins value[2] = {0,1};
}
reg_bit_edge_cp : coverpoint reg_bit {
bins rise = (0 => 1);
bins fall = (1 => 0);
}

endgroup
covergroup soc_ifc_reg__CPTRA_TRNG_CTRL_fld_cg with function sample(
input bit [1-1:0] clear
);
option.per_instance = 1;
clear_cp : coverpoint clear;

endgroup

/*----------------------- SOC_IFC_REG__CPTRA_TRNG_STATUS COVERGROUPS -----------------------*/
covergroup soc_ifc_reg__CPTRA_TRNG_STATUS_bit_cg with function sample(input bit reg_bit);
option.per_instance = 1;
Expand Down Expand Up @@ -568,10 +588,12 @@

endgroup
covergroup soc_ifc_reg__CPTRA_HW_REV_ID_fld_cg with function sample(
input bit [32-1:0] REV_ID
input bit [16-1:0] CPTRA_GENERATION,
input bit [16-1:0] SOC_STEPPING_ID
);
option.per_instance = 1;
REV_ID_cp : coverpoint REV_ID; // FIXME
CPTRA_GENERATION_cp : coverpoint CPTRA_GENERATION; // FIXME
SOC_STEPPING_ID_cp : coverpoint SOC_STEPPING_ID; // FIXME

endgroup

Expand Down Expand Up @@ -1123,6 +1145,26 @@

endgroup

/*----------------------- SOC_IFC_REG__FUSE_SOC_STEPPING_ID COVERGROUPS -----------------------*/
covergroup soc_ifc_reg__fuse_soc_stepping_id_bit_cg with function sample(input bit reg_bit);
option.per_instance = 1;
reg_bit_cp : coverpoint reg_bit {
bins value[2] = {0,1};
}
reg_bit_edge_cp : coverpoint reg_bit {
bins rise = (0 => 1);
bins fall = (1 => 0);
}

endgroup
covergroup soc_ifc_reg__fuse_soc_stepping_id_fld_cg with function sample(
input bit [16-1:0] soc_stepping_id
);
option.per_instance = 1;
soc_stepping_id_cp : coverpoint soc_stepping_id;

endgroup

/*----------------------- SOC_IFC_REG__INTERNAL_OBF_KEY COVERGROUPS -----------------------*/
covergroup soc_ifc_reg__internal_obf_key_bit_cg with function sample(input bit reg_bit);
option.per_instance = 1;
Expand Down
46 changes: 37 additions & 9 deletions src/soc_ifc/rtl/soc_ifc_reg_pkg.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -111,6 +111,7 @@ package soc_ifc_reg_pkg;

typedef struct packed{
logic swwe;
logic hwclr;
} soc_ifc_reg__CPTRA_TRNG_DATA__DATA__in_t;

typedef struct packed{
Expand Down Expand Up @@ -160,6 +161,14 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__CPTRA_GENERIC_INPUT_WIRES__generic_wires__in_t generic_wires;
} soc_ifc_reg__CPTRA_GENERIC_INPUT_WIRES__in_t;

typedef struct packed{
logic [15:0] next;
} soc_ifc_reg__CPTRA_HW_REV_ID__SOC_STEPPING_ID__in_t;

typedef struct packed{
soc_ifc_reg__CPTRA_HW_REV_ID__SOC_STEPPING_ID__in_t SOC_STEPPING_ID;
} soc_ifc_reg__CPTRA_HW_REV_ID__in_t;

typedef struct packed{
logic next;
} soc_ifc_reg__CPTRA_HW_CONFIG__iTRNG_en__in_t;
Expand Down Expand Up @@ -285,6 +294,14 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__Fuse_w32__in_t lms_revocation;
} soc_ifc_reg__fuse_lms_revocation__in_t;

typedef struct packed{
logic swwel;
} soc_ifc_reg__Fuse_w16__in_t;

typedef struct packed{
soc_ifc_reg__Fuse_w16__in_t soc_stepping_id;
} soc_ifc_reg__fuse_soc_stepping_id__in_t;

typedef struct packed{
logic [31:0] next;
logic wel;
Expand Down Expand Up @@ -422,6 +439,7 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__CPTRA_BOOTFSM_GO__in_t CPTRA_BOOTFSM_GO;
soc_ifc_reg__CPTRA_DBG_MANUF_SERVICE_REG__in_t CPTRA_DBG_MANUF_SERVICE_REG;
soc_ifc_reg__CPTRA_GENERIC_INPUT_WIRES__in_t [2-1:0]CPTRA_GENERIC_INPUT_WIRES;
soc_ifc_reg__CPTRA_HW_REV_ID__in_t CPTRA_HW_REV_ID;
soc_ifc_reg__CPTRA_HW_CONFIG__in_t CPTRA_HW_CONFIG;
soc_ifc_reg__CPTRA_WDT_STATUS__in_t CPTRA_WDT_STATUS;
soc_ifc_reg__CPTRA_FUSE_VALID_PAUSER__in_t CPTRA_FUSE_VALID_PAUSER;
Expand All @@ -439,6 +457,7 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__fuse_life_cycle__in_t fuse_life_cycle;
soc_ifc_reg__fuse_lms_verify__in_t fuse_lms_verify;
soc_ifc_reg__fuse_lms_revocation__in_t fuse_lms_revocation;
soc_ifc_reg__fuse_soc_stepping_id__in_t fuse_soc_stepping_id;
soc_ifc_reg__internal_obf_key__in_t [8-1:0]internal_obf_key;
soc_ifc_reg__internal_iccm_lock__in_t internal_iccm_lock;
soc_ifc_reg__internal_rv_mtime_l__in_t internal_rv_mtime_l;
Expand Down Expand Up @@ -583,6 +602,14 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__CPTRA_TRNG_DATA__DATA__out_t DATA;
} soc_ifc_reg__CPTRA_TRNG_DATA__out_t;

typedef struct packed{
logic value;
} soc_ifc_reg__CPTRA_TRNG_CTRL__clear__out_t;

typedef struct packed{
soc_ifc_reg__CPTRA_TRNG_CTRL__clear__out_t clear;
} soc_ifc_reg__CPTRA_TRNG_CTRL__out_t;

typedef struct packed{
logic value;
} soc_ifc_reg__CPTRA_TRNG_STATUS__DATA_REQ__out_t;
Expand Down Expand Up @@ -640,14 +667,6 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__CPTRA_GENERIC_OUTPUT_WIRES__generic_wires__out_t generic_wires;
} soc_ifc_reg__CPTRA_GENERIC_OUTPUT_WIRES__out_t;

typedef struct packed{
logic [31:0] value;
} soc_ifc_reg__CPTRA_HW_REV_ID__REV_ID__out_t;

typedef struct packed{
soc_ifc_reg__CPTRA_HW_REV_ID__REV_ID__out_t REV_ID;
} soc_ifc_reg__CPTRA_HW_REV_ID__out_t;

typedef struct packed{
logic [31:0] value;
} soc_ifc_reg__CPTRA_FW_REV_ID__REV_ID__out_t;
Expand Down Expand Up @@ -805,6 +824,14 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__Fuse_w32__out_t lms_revocation;
} soc_ifc_reg__fuse_lms_revocation__out_t;

typedef struct packed{
logic [15:0] value;
} soc_ifc_reg__Fuse_w16__out_t;

typedef struct packed{
soc_ifc_reg__Fuse_w16__out_t soc_stepping_id;
} soc_ifc_reg__fuse_soc_stepping_id__out_t;

typedef struct packed{
logic [31:0] value;
} soc_ifc_reg__key_w32__out_t;
Expand Down Expand Up @@ -947,14 +974,14 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__CPTRA_TRNG_VALID_PAUSER__out_t CPTRA_TRNG_VALID_PAUSER;
soc_ifc_reg__CPTRA_TRNG_PAUSER_LOCK__out_t CPTRA_TRNG_PAUSER_LOCK;
soc_ifc_reg__CPTRA_TRNG_DATA__out_t [12-1:0]CPTRA_TRNG_DATA;
soc_ifc_reg__CPTRA_TRNG_CTRL__out_t CPTRA_TRNG_CTRL;
soc_ifc_reg__CPTRA_TRNG_STATUS__out_t CPTRA_TRNG_STATUS;
soc_ifc_reg__CPTRA_FUSE_WR_DONE__out_t CPTRA_FUSE_WR_DONE;
soc_ifc_reg__CPTRA_BOOTFSM_GO__out_t CPTRA_BOOTFSM_GO;
soc_ifc_reg__CPTRA_DBG_MANUF_SERVICE_REG__out_t CPTRA_DBG_MANUF_SERVICE_REG;
soc_ifc_reg__CPTRA_CLK_GATING_EN__out_t CPTRA_CLK_GATING_EN;
soc_ifc_reg__CPTRA_GENERIC_INPUT_WIRES__out_t [2-1:0]CPTRA_GENERIC_INPUT_WIRES;
soc_ifc_reg__CPTRA_GENERIC_OUTPUT_WIRES__out_t [2-1:0]CPTRA_GENERIC_OUTPUT_WIRES;
soc_ifc_reg__CPTRA_HW_REV_ID__out_t CPTRA_HW_REV_ID;
soc_ifc_reg__CPTRA_FW_REV_ID__out_t [2-1:0]CPTRA_FW_REV_ID;
soc_ifc_reg__CPTRA_WDT_TIMER1_EN__out_t CPTRA_WDT_TIMER1_EN;
soc_ifc_reg__CPTRA_WDT_TIMER1_CTRL__out_t CPTRA_WDT_TIMER1_CTRL;
Expand All @@ -978,6 +1005,7 @@ package soc_ifc_reg_pkg;
soc_ifc_reg__fuse_life_cycle__out_t fuse_life_cycle;
soc_ifc_reg__fuse_lms_verify__out_t fuse_lms_verify;
soc_ifc_reg__fuse_lms_revocation__out_t fuse_lms_revocation;
soc_ifc_reg__fuse_soc_stepping_id__out_t fuse_soc_stepping_id;
soc_ifc_reg__internal_obf_key__out_t [8-1:0]internal_obf_key;
soc_ifc_reg__internal_iccm_lock__out_t internal_iccm_lock;
soc_ifc_reg__internal_fw_update_reset__out_t internal_fw_update_reset;
Expand Down
60 changes: 56 additions & 4 deletions src/soc_ifc/rtl/soc_ifc_reg_sample.svh
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Original file line number Diff line number Diff line change
Expand Up @@ -443,6 +443,31 @@
end
endfunction

/*----------------------- SOC_IFC_REG__CPTRA_TRNG_CTRL SAMPLE FUNCTIONS -----------------------*/
function void soc_ifc_reg__CPTRA_TRNG_CTRL::sample(uvm_reg_data_t data,
uvm_reg_data_t byte_en,
bit is_read,
uvm_reg_map map);
m_current = get();
m_data = data;
m_is_read = is_read;
if (get_coverage(UVM_CVR_REG_BITS)) begin
foreach(clear_bit_cg[bt]) this.clear_bit_cg[bt].sample(data[0 + bt]);
end
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
this.fld_cg.sample( data[0:0]/*clear*/ );
end
endfunction

function void soc_ifc_reg__CPTRA_TRNG_CTRL::sample_values();
if (get_coverage(UVM_CVR_REG_BITS)) begin
foreach(clear_bit_cg[bt]) this.clear_bit_cg[bt].sample(clear.get_mirrored_value() >> bt);
end
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
this.fld_cg.sample( clear.get_mirrored_value() );
end
endfunction

/*----------------------- SOC_IFC_REG__CPTRA_TRNG_STATUS SAMPLE FUNCTIONS -----------------------*/
function void soc_ifc_reg__CPTRA_TRNG_STATUS::sample(uvm_reg_data_t data,
uvm_reg_data_t byte_en,
Expand Down Expand Up @@ -654,19 +679,21 @@
m_data = data;
m_is_read = is_read;
if (get_coverage(UVM_CVR_REG_BITS)) begin
foreach(REV_ID_bit_cg[bt]) this.REV_ID_bit_cg[bt].sample(data[0 + bt]);
foreach(CPTRA_GENERATION_bit_cg[bt]) this.CPTRA_GENERATION_bit_cg[bt].sample(data[0 + bt]);
foreach(SOC_STEPPING_ID_bit_cg[bt]) this.SOC_STEPPING_ID_bit_cg[bt].sample(data[16 + bt]);
end
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
this.fld_cg.sample( data[31:0]/*REV_ID*/ );
this.fld_cg.sample( data[15:0]/*CPTRA_GENERATION*/ , data[31:16]/*SOC_STEPPING_ID*/ );
end
endfunction

function void soc_ifc_reg__CPTRA_HW_REV_ID::sample_values();
if (get_coverage(UVM_CVR_REG_BITS)) begin
foreach(REV_ID_bit_cg[bt]) this.REV_ID_bit_cg[bt].sample(REV_ID.get_mirrored_value() >> bt);
foreach(CPTRA_GENERATION_bit_cg[bt]) this.CPTRA_GENERATION_bit_cg[bt].sample(CPTRA_GENERATION.get_mirrored_value() >> bt);
foreach(SOC_STEPPING_ID_bit_cg[bt]) this.SOC_STEPPING_ID_bit_cg[bt].sample(SOC_STEPPING_ID.get_mirrored_value() >> bt);
end
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
this.fld_cg.sample( REV_ID.get_mirrored_value() );
this.fld_cg.sample( CPTRA_GENERATION.get_mirrored_value() , SOC_STEPPING_ID.get_mirrored_value() );
end
endfunction

Expand Down Expand Up @@ -1278,6 +1305,31 @@
end
endfunction

/*----------------------- SOC_IFC_REG__FUSE_SOC_STEPPING_ID SAMPLE FUNCTIONS -----------------------*/
function void soc_ifc_reg__fuse_soc_stepping_id::sample(uvm_reg_data_t data,
uvm_reg_data_t byte_en,
bit is_read,
uvm_reg_map map);
m_current = get();
m_data = data;
m_is_read = is_read;
if (get_coverage(UVM_CVR_REG_BITS)) begin
foreach(soc_stepping_id_bit_cg[bt]) this.soc_stepping_id_bit_cg[bt].sample(data[0 + bt]);
end
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
this.fld_cg.sample( data[15:0]/*soc_stepping_id*/ );
end
endfunction

function void soc_ifc_reg__fuse_soc_stepping_id::sample_values();
if (get_coverage(UVM_CVR_REG_BITS)) begin
foreach(soc_stepping_id_bit_cg[bt]) this.soc_stepping_id_bit_cg[bt].sample(soc_stepping_id.get_mirrored_value() >> bt);
end
if (get_coverage(UVM_CVR_FIELD_VALS)) begin
this.fld_cg.sample( soc_stepping_id.get_mirrored_value() );
end
endfunction

/*----------------------- SOC_IFC_REG__INTERNAL_OBF_KEY SAMPLE FUNCTIONS -----------------------*/
function void soc_ifc_reg__internal_obf_key::sample(uvm_reg_data_t data,
uvm_reg_data_t byte_en,
Expand Down
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