Merge branch 'rev05-mobo'

.github/workflows/export-cables.yaml

@@ -23,8 +23,9 @@ jobs:
         sudo apt -qq update
         sudo apt-get -qq -y install python3
         sudo apt-get -qq -y install python3-pip
+        sudo apt-get install graphviz
         python3 -m pip install --upgrade pip
-        pip install wireviz
+        pip install wireviz==0.3.2
 
     - name: Generate Wireviz Images
       run:  |
@@ -34,7 +35,7 @@ jobs:
     - name: Zip BOM Directory for Workflow Dispatch
       if: github.event_name != 'release'
       run: |
-        ls -al
+        ls -al cable-export/
         zip -r LumenPnP-Cables.zip cable-export/
         ls -al
 

.github/workflows/export-ecad.yaml

@@ -8,7 +8,7 @@ jobs:
   export-ecad:
     name: Export ECAD
     runs-on: ubuntu-latest
-    container: ghcr.io/inti-cmnb/kicad_auto:latest
+    container: ghcr.io/inti-cmnb/kicad8_auto
 
     steps:
 
@@ -43,6 +43,9 @@ jobs:
         sed -i "s!<<hash>>!${COMMIT}!" pnp/pcb/staging-plate/staging-plate.kicad_pcb
         sed -i "s!<<hash>>!${COMMIT}!" pnp/pcb/datum/datum.kicad_pcb
         sed -i "s!<<hash>>!${COMMIT}!" pnp/pcb/ftp/ftp.kicad_pcb
+        sed -i "s!<<hash>>!${COMMIT}!" pnp/pcb/x-cable-chain-support/x-cable-chain-support.kicad_pcb
+        sed -i "s!<<hash>>!${COMMIT}!" pnp/pcb/xy-limit/xy-limit.kicad_pcb
+        sed -i "s!<<hash>>!${COMMIT}!" pnp/pcb/z-limit/z-limit.kicad_pcb
 
     - name: Update the PCBs with the git hash and BETA.
       if: steps.extract_branch.outputs.branch != env.main_branch
@@ -54,6 +57,9 @@ jobs:
         sed -i "s!<<hash>>!BETA-${COMMIT}!" pnp/pcb/staging-plate/staging-plate.kicad_pcb
         sed -i "s!<<hash>>!BETA-${COMMIT}!" pnp/pcb/datum/datum.kicad_pcb
         sed -i "s!<<hash>>!BETA-${COMMIT}!" pnp/pcb/ftp/ftp.kicad_pcb
+        sed -i "s!<<hash>>!BETA-${COMMIT}!" pnp/pcb/x-cable-chain-support/x-cable-chain-support.kicad_pcb
+        sed -i "s!<<hash>>!BETA-${COMMIT}!" pnp/pcb/xy-limit/xy-limit.kicad_pcb
+        sed -i "s!<<hash>>!BETA-${COMMIT}!" pnp/pcb/z-limit/z-limit.kicad_pcb
 
 
 #mobo
@@ -89,7 +95,7 @@ jobs:
       run: |
         cd pnp/pcb/staging-plate 
         rm -rf staging-plate/     
-        kibot -c ../../../.github/workflows/scripts/kibot/config-2layer.kibot.yaml -e staging-plate.kicad_sch -b staging-plate.kicad_pcb -d staging-plate
+        kibot -c ../../../.github/workflows/scripts/kibot/config-2layer-nobom.kibot.yaml -e staging-plate.kicad_sch -b staging-plate.kicad_pcb -d staging-plate
         zip -r -j staging-plate.zip staging-plate/
 
 #ftp
@@ -101,17 +107,44 @@ jobs:
         kibot -c ../../../.github/workflows/scripts/kibot/config-2layer.kibot.yaml -e ftp.kicad_sch -b ftp.kicad_pcb -d ftp
         zip -r -j ftp.zip ftp/
 
+# x cable chain support
+
+    - name: Generate X cable chain support Export Files
+      run: |
+        cd pnp/pcb/x-cable-chain-support 
+        rm -rf x-cable-chain-support/     
+        kibot -c ../../../.github/workflows/scripts/kibot/config-2layer.kibot.yaml -e x-cable-chain-support.kicad_sch -b x-cable-chain-support.kicad_pcb -d x-cable-chain-support
+        zip -r -j x-cable-chain-support.zip x-cable-chain-support/
+
+# xy limit
+
+    - name: Generate XY Limit Export Files
+      run: |
+        cd pnp/pcb/xy-limit
+        rm -rf xy-limit/     
+        kibot -c ../../../.github/workflows/scripts/kibot/config-2layer.kibot.yaml -e xy-limit.kicad_sch -b xy-limit.kicad_pcb -d xy-limit
+        zip -r -j xy-limit.zip xy-limit/
+
+# z limit
+
+    - name: Generate X cable chain support Export Files
+      run: |
+        cd pnp/pcb/z-limit
+        rm -rf z-limit/     
+        kibot -c ../../../.github/workflows/scripts/kibot/config-2layer.kibot.yaml -e z-limit.kicad_sch -b z-limit.kicad_pcb -d z-limit
+        zip -r -j z-limit.zip z-limit/
+
 # Zip and Upload
 
     - name: Zip Mobo Export Files for Artifacts  
       run: |
         cd pnp/pcb/
-        zip -r -j LumenPnP-PCBs.zip mobo/mobo.zip ring-light/ringLight.zip datum/datum.zip staging-plate/staging-plate.zip ftp/ftp.zip
+        zip -r -j LumenPnP-PCBs.zip mobo/mobo.zip ring-light/ringLight.zip datum/datum.zip staging-plate/staging-plate.zip ftp/ftp.zip x-cable-chain-support/x-cable-chain-support.zip xy-limit/xy-limit.zip z-limit/z-limit.zip
 
     - name: Zip Mobo Export Files for Release  
       run: |
         cd pnp/pcb/
-        zip -r -j LumenPnP-PCBs-${{ github.event.release.tag_name }}.zip mobo/mobo.zip ring-light/ringLight.zip datum/datum.zip staging-plate/staging-plate.zip ftp/ftp.zip
+        zip -r -j LumenPnP-PCBs-${{ github.event.release.tag_name }}.zip mobo/mobo.zip ring-light/ringLight.zip datum/datum.zip staging-plate/staging-plate.zip ftp/ftp.zip x-cable-chain-support/x-cable-chain-support.zip xy-limit/xy-limit.zip z-limit/z-limit.zip
 
     - name: Upload Mobo Export Files as Artifacts
       uses: actions/upload-artifact@v2

.github/workflows/scripts/export-cables.sh

@@ -28,4 +28,4 @@ for harness in pnp/cad/CHA/*/ ; do
             echo "Skipping img folder"
         fi  
     fi
-done
+done

.github/workflows/scripts/kibot/config-2layer-nobom.kibot.yaml

@@ -0,0 +1,101 @@
+# Example KiPlot config file
+kibot:
+  version: 1
+
+filters:
+  - name: only_jlc_parts
+    comment: 'Only parts with JLC code'
+    type: 'generic'
+    include_only:
+      - column: 'JLCPCB'
+        regex: '^C\d+'
+  - name: fix_rotation
+    comment: 'Adjust rotation for JLC'
+    type: rot_footprint
+    rotations:
+      - ["^TI_SO-", 270.0]
+      - ["^SO-", 270.0]
+      - ["^HTSSOP-", 270.0]
+      - ["^SSOP-", 270.0]
+
+preflight:
+  # Disable ERC for now while GPereira updates these items.
+  run_erc: false
+  update_xml: false
+  # Disable DRC for now while GPereira updates these items.
+  run_drc: false
+  check_zone_fills: true
+  ignore_unconnected: true
+
+outputs:
+  - name: 'gerbers'
+    comment: "Gerbers for the board house"
+    type: gerber
+    dir: gerbers
+    options:
+      # generic layer options
+      exclude_edge_layer: true
+      exclude_pads_from_silkscreen: false
+      use_aux_axis_as_origin: false
+      plot_sheet_reference: false
+      plot_footprint_refs: true
+      plot_footprint_values: true
+      force_plot_invisible_refs_vals: false
+      tent_vias: true
+
+      # gerber options
+      line_width: 0.1
+      subtract_mask_from_silk: false
+      use_protel_extensions: false
+      gerber_precision: 4.6
+      create_gerber_job_file: true
+      use_gerber_x2_attributes: false
+      use_gerber_net_attributes: false
+
+      output: '%f.%i'
+
+
+    layers:
+      # When Moving to Four Layer, Set G2L and G3L as the suffixes
+      - layer: F.Cu
+        suffix: GTL
+      - layer: B.Cu
+        suffix: GBL
+      - layer: F.SilkS
+        suffix: GTO
+      - layer: B.SilkS
+        suffix: GBO
+      - layer: F.Mask
+        suffix: GTS
+      - layer: B.Mask
+        suffix: GBS
+      - layer: Edge.Cuts
+        suffix: GKO
+
+  - name: 'drill_file'
+    comment: 'Drill file for Board House'
+    type: excellon
+    dir: gerbers
+    options:
+      metric_units: false
+      pth_and_npth_single_file: true
+
+  - name: board_top
+    comment: "Top layer view"
+    type: pcbdraw
+    dir: .
+    options:
+      format: png
+
+  - name: board_bottom
+    comment: "Bottom layer view"
+    type: pcbdraw
+    dir: .
+    options:
+      format: png
+      bottom: true
+
+  - name: 'step_file'
+    comment: 'STEP file generation'
+    type: step
+    dir: .

.gitignore

@@ -6,12 +6,21 @@
 ## removing virtual environments
 venv/
 
+## removing exports
+out/
+
 ## removing vs code workspaces
 *.code-workspace
 
 ## removing freecad autosaves
 *.FCStd?
 
+## removing kicad backupts
+*-backups/
+
+## removing kicad locks
+*.lck
+
 ## Auto Generated Code
 doc/public
 doc/node_modules
@@ -24,4 +33,10 @@ doc/resources
 **/pcb/**/export
 # Hide STL models
 pnp/cad/3D-Prints/*.stl
-out/
+# hide the wireviz exports
+pnp/cad/CHA/**/*.png
+pnp/cad/CHA/**/*.svg
+
+# hides autobom experimentation
+autobom.json
+bom.json