110550088 lab6

lab6/bootloader/include/utils.h

@@ -1,6 +1,20 @@
 #ifndef	_UTILS_H
 #define	_UTILS_H
 
+// Reference from https://elixir.bootlin.com/linux/latest/source/tools/lib/perf/mmap.c#L299
+#define read_sysreg(r) ({                       \
+    uint64_t __val;                               \
+    asm volatile("mrs %0, " #r : "=r" (__val)); \
+    __val;                                      \
+})
+
+// Reference from https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/asm/sysreg.h#L1281
+#define write_sysreg(r, v) do {    \
+    uint64_t __val = (uint64_t)(v);          \
+    asm volatile("msr " #r ", %x0" \
+             : : "rZ" (__val));    \
+} while (0)
+
 extern void delay ( unsigned long);
 extern void put32 ( unsigned long, unsigned int );
 extern unsigned int get32 ( unsigned long );

lab6/bootloader/src/mini_uart.c

@@ -1,6 +1,7 @@
 #include "utils.h"
 #include "peripherals/mini_uart.h"
 #include "peripherals/gpio.h"
+#include <stdint.h>
 
 void uart_send ( char c )
 {
@@ -39,10 +40,10 @@ void uart_send_string(char* str)
 	}
 }
 
-void uart_hex(unsigned int d) {
+void uart_hex(uint64_t d) {
     unsigned int n;
     int c;
-    for (c = 28; c >= 0; c -= 4) {
+    for (c = 60; c >= 0; c -= 4) {
         // get highest tetrad
         n = (d >> c) & 0xF;
         // 0-9 => '0'-'9', 10-15 => 'A'-'F'

lab6/include/alloc.h

@@ -1,8 +1,9 @@
 #ifndef _ALLOC_H_
 #define _ALLOC_H_
+#include "utils.h"
 
-#define PAGE_BASE (void*)0x0
-#define PAGE_END  (void*)0x3b400000
+#define PAGE_BASE (void*)PA2VA(0x0)
+#define PAGE_END  (void*)PA2VA(0x3b400000)
 #define PAGE_SIZE 0x1000 // 4KB
 
 #define MAX_ORDER 11

lab6/include/exec.h

@@ -0,0 +1,7 @@
+#ifndef _EXEC_H
+#define _EXEC_H
+
+void exec_user_prog(void *entry, char *user_sp, char *kernel_sp);
+void enter_el0_run_user_prog(void *entry, char *user_sp);
+
+#endif /* _EXEC_H */

lab6/include/initrd.h

@@ -35,5 +35,5 @@ void initrd_callback(unsigned int node_type, char *name, void *value, unsigned i
 void initrd_exec_prog(char* target);
 void initrd_exec_syscall();
 void initrd_run_syscall();
-void exec_user_prog ();
+
 #endif // INITRD_H

lab6/include/mbox.h

@@ -1,8 +1,10 @@
 #ifndef _MBOX_H
 #define _MBOX_H 
 
+#include "utils.h"
+
 #define MMIO_BASE       0x3f000000
-#define MAILBOX_BASE    MMIO_BASE + 0xb880
+#define MAILBOX_BASE    PA2VA(MMIO_BASE + 0xb880)
 
 #define MAILBOX_READ    (unsigned int*)(MAILBOX_BASE)
 #define MAILBOX_STATUS  (unsigned int*)(MAILBOX_BASE + 0x18)

lab6/include/mini_uart.h

@@ -3,13 +3,15 @@
 
 #define BUFFER_SIZE 1024
 
+#include <stdint.h>
+
 void uart_init ( void );
 void uart_enable_interrupt( void );
 void uart_disable_interrupt( void );
 char uart_recv ( void );
 void uart_send ( char c );
 void uart_send_string(const char* str);
-void uart_hex(unsigned int d);
+void uart_hex(uint64_t d);
 void uart_irq_handler(void);
 char uart_async_recv( void );
 void uart_async_send_string(const char* buffer);

lab6/include/mmu.h

@@ -0,0 +1,24 @@
+#ifndef _MMU_H
+#define _MMU_H
+
+
+#define PAGE_TABLE_SIZE 0x1000
+
+#define PT_R    0x0001
+#define PT_W    0x0002
+#define PT_X    0x0004
+
+#include <stdint.h>
+
+/*
+ * Set identity paging, enable MMU
+ */
+void mmu_init(void);
+
+uint64_t *pt_create(void);
+void pt_free(uint64_t *pt);
+
+void pt_map(uint64_t *pt, void *va, uint64_t size, void *pa, uint64_t flag);
+
+
+#endif /* _MMU_H */

lab6/include/thread.h

@@ -2,7 +2,7 @@
 #define _THREAD_H
 
 
-#define T_STACK_SIZE (2 * 0x1000) // 2^12 = 4096 = 4KB = 1 page
+#define T_STACK_SIZE (4 * 0x1000) // 2^12 = 4096 = 4KB = 1 page
 #define SIGNAL_NUM 9
 
 #include <stdint.h>
@@ -33,8 +33,10 @@ typedef struct callee_reg_t {
 typedef struct thread_t {
     // need to be put as the first variable
     callee_reg_t callee_reg;
+    uint64_t *page_table;
     int tid; // thread id
     thread_state state;
+
     void* user_stack;
     void* kernel_stack;
     void* data;
@@ -46,6 +48,7 @@ typedef struct thread_t {
     int waiting_signal[SIGNAL_NUM+1];
     int is_processing_signal;
     callee_reg_t signal_regs;
+    uint64_t signal_page_table;
 
     // use in queue
     struct thread_t *prev;

lab6/include/utils.h

@@ -0,0 +1,42 @@
+#ifndef	_UTILS_H
+#define	_UTILS_H
+
+
+#include <stdint.h>
+
+#define PA2VA(x) (((uint64_t)(x)) | 0xffff000000000000)
+#define VA2PA(x) (((uint64_t)(x)) & 0x0000ffffffffffff)
+#define ALIGN(num, base) ((num + base - 1) & ~(base - 1))
+
+
+// Reference from https://elixir.bootlin.com/linux/latest/source/tools/lib/perf/mmap.c#L299
+#define read_sysreg(r) ({                       \
+    uint64_t __val;                               \
+    asm volatile("mrs %0, " #r : "=r" (__val)); \
+    __val;                                      \
+})
+
+// Reference from https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/asm/sysreg.h#L1281
+#define write_sysreg(r, v) do {    \
+    uint64_t __val = (uint64_t)(v);          \
+    asm volatile("msr " #r ", %x0" \
+             : : "rZ" (__val));    \
+} while (0)
+
+#define set_page_table(thread) do {               \
+    asm volatile(                               \
+        "mov x9, %0\n"                          \
+        "and x9, x9, #0x0000ffffffffffff\n"     \
+        "dsb ish\n"                             \
+        "msr ttbr0_el1, x9\n"                   \
+        "tlbi vmalle1is\n"                      \
+        "dsb ish\n"                             \
+        "isb\n"                                 \
+        :: "r" (thread->page_table)               \
+    );                                          \
+} while (0)
+
+extern void put32 ( unsigned long, unsigned int );
+extern unsigned int get32 ( unsigned long );
+
+#endif  /*_UTILS_H */

lab6/src/alloc.c

@@ -3,6 +3,7 @@
 #include "fdt.h"
 #include "initrd.h"
 #include "exception.h"
+#include "utils.h"
 #include <stdint.h>
 
 int debug = 1;
@@ -13,6 +14,9 @@ volatile char *heap_top;
 
 page* page_arr = 0;
 uint64_t total_page = 0;
+// free_list_t* free_list = 0;
+// chunk_info* chunk_info_arr = 0;
+
 free_list_t free_list[MAX_ORDER + 1];
 chunk_info chunk_info_arr[MAX_CHUNK + 1];
 
@@ -296,6 +300,9 @@ void insert_page(page* new_page, int order) {
 	if (free_list[order].head != 0) {
 		free_list[order].head -> prev = new_page;
 	}
+	if(!new_page){
+		uart_send_string("Error: insert_page with new_page = 0\n");
+	}
 	free_list[order].head = new_page;
 	free_list[order].cnt++;
 	return;
@@ -309,10 +316,10 @@ page* pop_page(int order) {
 		while(1);
 	}
 	page* ret = free_list[order].head;
-	free_list[order].head = ret->next;
 	if (free_list[order].head -> next != 0) {
-		free_list[order].head -> prev = 0;
+		free_list[order].head -> next -> prev = 0;
 	}
+	free_list[order].head = ret->next;
 	free_list[order].cnt--;
 	return ret;
 }
@@ -430,21 +437,24 @@ void* chunk_free(void* addr) {
 // Set heap base address
 void alloc_init()
 {
-	heap_top = ((volatile unsigned char *)(0x10000000));
+
+	heap_top = ((volatile unsigned char *)PA2VA(0x10000000));
 	char* old_heap_top = heap_top;
+	// free_list = PA2VA(simple_malloc((MAX_ORDER + 1) * sizeof(free_list_t)));
+	// chunk_info_arr = PA2VA(simple_malloc((MAX_CHUNK + 1) * sizeof(chunk_info)));
 	// uart_send_string("heap_top: ");
 	// uart_hex((unsigned long long)heap_top);
 	// uart_send_string("\n");
 	init_page_arr();
 	// reserve memory
-	memory_reserve((void*)0x0000, (void*)0x1000); // spin tables
+	memory_reserve((void*)PA2VA(0x0000), (void*)PA2VA(0x4000)); // spin tables and page tables
 	memory_reserve((void*)ramfs_base, (void*)ramfs_end); // ramfs
 	// memory_reserve((void*)dtb_base, (void*)dtb_end); // dtb
 
 	// kernel, bss, stack
 	// 0x80000 = _start
 	// 0x0200000 = __stack_end
-	memory_reserve((void*)0x80000, (void*)0x0200000); 
+	memory_reserve((void*)PA2VA(0x80000), (void*)PA2VA(0x0200000)); 
 
 	if(debug) {
 		uart_send_string("old_heap_top: ");
@@ -555,7 +565,7 @@ void* kmalloc(unsigned long long size) {
 	int idx = size2chunkidx(size);
 
 	void* addr;
-	int use_page_only = 0;
+	int use_page_only = 1;
 	if(use_page_only) {
 		addr = page_alloc(size);
 	} else if(idx >= 0) {

lab6/src/boot.S

@@ -1,4 +1,5 @@
 #include "mm.h"
+
 #define CORE0_TIMER_IRQ_CTRL 0x40000040
 
 .section ".text.boot"
@@ -17,14 +18,15 @@ proc_hang:
 master:
     bl from_el2_to_el1
 
-// core_timer_enable:
-//    mov x20, 1
-//    msr cntp_ctl_el0, x20 // enable timer
-//    mrs x20, cntfrq_el0
-//    msr cntp_tval_el0, x20 // set expired time
-//    mov x20, 2
-//    ldr x1, =CORE0_TIMER_IRQ_CTRL
-//    str w20, [x1] // unmask timer interrupt
+    ldr x1, =__PA_stack_end
+    mov sp, x1
+    mov x19, x0
+    bl mmu_init
+    mov x0, x19
+    ldr x1, =boot_rest
+    br x1
+
+boot_rest:
 
 set_exception_vector:
     // set exception vector table

lab6/src/context_switch.S

@@ -17,7 +17,19 @@ switch_to:
     ldp fp, lr, [x1, 16 * 5]
     ldr x9, [x1, 16 * 6]
     mov sp, x9
+
     msr tpidr_el1, x1
+
+    // switch page table
+    ldr x9, [x1, 8 * 13] // page_table in thread_t
+    and x9, x9, #0x0000ffffffffffff
+    dsb ish             // ensure write has completed
+    msr ttbr0_el1, x9   // switch translation based address.
+    tlbi vmalle1is      // invalidate all TLB entries
+    dsb ish             // ensure completion of TLB invalidatation
+    isb                 // clear pipeline
+
+
     ret