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Builds on #2169 With this PR, second-stage witness generation works for the bus used in the RISC-V machine 🎉 This is an end-to-end test: ```bash cargo run -r --bin powdr-rs compile riscv/tests/riscv_data/sum-o output --max-degree-log 15 --field gl cargo run -r pil output/sum.asm -o output -f --field gl --prove-with mock --linker-mode bus -i 1,1,1 ``` What's needed is two small changes to `VmProcessor`: - The degree is now passed by the caller (`DynamicMachine` or `SecondStageMachine`). That way, `SecondStageMachine` can set it to the actual final size, instead of the maximum allowed degree. - I disabled loop detection for second-stage witness generation for now.
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