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arm64: use aarch64-cpu crate
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Signed-off-by: Daniel Maslowski <[email protected]>
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orangecms committed Nov 27, 2024
1 parent 0cda5c2 commit 09524e8
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Showing 4 changed files with 22 additions and 10 deletions.
16 changes: 16 additions & 0 deletions Cargo.lock

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1 change: 1 addition & 0 deletions aarch64/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@ edition = "2021"
default-target = "aarch64-unknown-none"

[dependencies]
aarch64-cpu = "9.4.0"
bitstruct = "0.1"
port = { path = "../port" }
num_enum = { version = "0.7", default-features = false }
2 changes: 2 additions & 0 deletions aarch64/src/main.rs
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Expand Up @@ -22,6 +22,7 @@ mod vm;

use crate::kmem::from_virt_to_physaddr;
use crate::vm::kernel_root;

use core::ffi::c_void;
use core::ptr;
use port::fdt::DeviceTree;
Expand Down Expand Up @@ -125,6 +126,7 @@ pub extern "C" fn main9(dtb_va: usize) {
println!("r9 from the Internet");
println!("DTB found at: {:#x}", dtb_va);
println!("midr_el1: {:?}", registers::MidrEl1::read());
// registers::CNTVOFF_EL2.set(0);

print_binary_sections();
print_physical_memory_info();
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13 changes: 3 additions & 10 deletions aarch64/src/registers.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
#![allow(non_upper_case_globals)]

use aarch64_cpu::registers::{Readable, Writeable};
use aarch64_cpu::{asm, registers::MIDR_EL1};
use bitstruct::bitstruct;
use core::fmt;
use num_enum::TryFromPrimitive;
Expand Down Expand Up @@ -46,16 +48,7 @@ bitstruct! {

impl MidrEl1 {
pub fn read() -> Self {
#[cfg(not(test))]
{
let mut value: u64;
unsafe {
core::arch::asm!("mrs {value}, midr_el1", value = out(reg) value);
}
Self(value)
}
#[cfg(test)]
Self(0)
Self(if cfg!(test) { 0 } else { MIDR_EL1.extract().into() })
}

pub fn partnum_enum(&self) -> Result<PartNum, u16> {
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