First compiling commit of CAN driver with all traits marked with `uni…

…mplemented!()` Signed-off-by: delphi <[email protected]>
riscv-rust · Feb 4, 2021 · 6f720be · 6f720be
1 parent 37d0dec
commit 6f720be
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Showing 4 changed files with 8 additions and 1 deletion.
diff --git a/Cargo.toml b/Cargo.toml
@@ -16,6 +16,7 @@ nb = "0.1.2"
 void = { version = "1.0.2", default-features = false }
 cast = { version = "0.2.3", default-features = false }
 vcell = "0.1.2"
+embedded-can = "0.3.0"
 
 [dependencies.embedded-hal]
 version = "0.2.3"

diff --git a/src/afio.rs b/src/afio.rs
@@ -119,9 +119,11 @@ macro_rules! remap {
 }
 
 remap! {
+    CAN0 => (can0_remap, u8),
+    CAN1 => (can1_remap, bool),
     I2C0 => (i2c0_remap, bool),
     SPI0 => (spi0_remap, bool),
-    SPI2 => (spi2_remap, bool),
+    SPI2 => (spi2_remap, bool),    
     USART0 => (usart0_remap, bool),
     USART1 => (usart1_remap, bool),
     USART2 => (usart2_remap, u8),

diff --git a/src/lib.rs b/src/lib.rs
@@ -8,9 +8,11 @@
 pub use gd32vf103_pac as pac;
 
 use embedded_hal as hal;
+use embedded_can as hal_can;
 
 pub mod afio;
 pub mod backup_domain;
+pub mod can;
 pub mod delay;
 pub mod eclic;
 pub mod exmc;

diff --git a/src/rcu.rs b/src/rcu.rs
@@ -285,6 +285,8 @@ base_freq! {
     SPI0 => pclk2,
     SPI1 => pclk1,
     SPI2 => pclk1,
+    CAN0 => pclk1,
+    CAN1 => pclk1,
     TIMER0 => timer0,
     TIMER1 => timerx,
     TIMER2 => timerx,