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drivers: k230: Add spi driver #195

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Nov 21, 2024
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9 changes: 9 additions & 0 deletions arch/riscv/boot/dts/canaan/k230-canmv.dts
Original file line number Diff line number Diff line change
Expand Up @@ -123,3 +123,12 @@
gpio_wl_reg_on = <&gpio0_ports 1 GPIO_ACTIVE_HIGH>;
};
};

&spi0 {
status = "okay";
spidev@0{
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <100000000>;
};
};
61 changes: 61 additions & 0 deletions arch/riscv/boot/dts/canaan/k230.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -538,6 +538,67 @@
reg = <0x0 0x91000c00 0x0 0x20>;
};

spi0: spi@91584000 {
compatible = "canaan,k230-spi";
reg = <0x0 0x91584000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <146 IRQ_TYPE_LEVEL_HIGH>,
<147 IRQ_TYPE_LEVEL_HIGH>,
<148 IRQ_TYPE_LEVEL_HIGH>,
<149 IRQ_TYPE_LEVEL_HIGH>,
<150 IRQ_TYPE_LEVEL_HIGH>,
<151 IRQ_TYPE_LEVEL_HIGH>,
<152 IRQ_TYPE_LEVEL_HIGH>,
<153 IRQ_TYPE_LEVEL_HIGH>,
<154 IRQ_TYPE_LEVEL_HIGH>;
rx-sample-delay-ns = <5>;
num-cs = <1>;
reg-io-width = <4>;
clocks = <&ssi0_clk>;
status = "disabled";
};

spi1: spi@91582000 {
compatible = "canaan,k230-spi";
reg = <0x0 0x91582000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <155 IRQ_TYPE_LEVEL_HIGH>,
<156 IRQ_TYPE_LEVEL_HIGH>,
<157 IRQ_TYPE_LEVEL_HIGH>,
<158 IRQ_TYPE_LEVEL_HIGH>,
<159 IRQ_TYPE_LEVEL_HIGH>,
<160 IRQ_TYPE_LEVEL_HIGH>,
<161 IRQ_TYPE_LEVEL_HIGH>,
<162 IRQ_TYPE_LEVEL_HIGH>,
<163 IRQ_TYPE_LEVEL_HIGH>;
num-cs = <1>;
reg-io-width = <4>;
clocks = <&ssi1_clk>;
status = "disabled";
};

spi2: spi@91583000 {
compatible = "canaan,k230-spi";
reg = <0x0 0x91583000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <164 IRQ_TYPE_LEVEL_HIGH>,
<165 IRQ_TYPE_LEVEL_HIGH>,
<166 IRQ_TYPE_LEVEL_HIGH>,
<167 IRQ_TYPE_LEVEL_HIGH>,
<168 IRQ_TYPE_LEVEL_HIGH>,
<169 IRQ_TYPE_LEVEL_HIGH>,
<170 IRQ_TYPE_LEVEL_HIGH>,
<171 IRQ_TYPE_LEVEL_HIGH>,
<172 IRQ_TYPE_LEVEL_HIGH>;
num-cs = <1>;
reg-io-width = <4>;
clocks = <&ssi2_clk>;
status = "disabled";
};

vpu: vpu@0x90400000 {
status = "okay";
compatible = "canaan,vpu";
Expand Down
3 changes: 0 additions & 3 deletions arch/riscv/configs/k230_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -152,11 +152,8 @@ CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_I2C_MV64XXX=m
CONFIG_SPI=y
CONFIG_SPI_DW_QUAD=y
CONFIG_SPI_DESIGNWARE=y
CONFIG_SPI_DW_MMIO=y
CONFIG_SPI_SIFIVE=y
CONFIG_SPI_SUN6I=y
CONFIG_SPI_SPIDEV=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_GPIO_K230=y
Expand Down
14 changes: 14 additions & 0 deletions drivers/spi/spi-dw-core.c
Original file line number Diff line number Diff line change
Expand Up @@ -910,6 +910,20 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
dev_err(dev, "can not get IRQ\n");
goto err_free_host;
}
if (dws->caps & DW_SPI_CAP_INDEP_IRQ) {
int i;

for (i = 0; i < ARRAY_SIZE(dws->irqs); i++) {
if (dws->irqs[i] == 0)
break;
ret = request_irq(dws->irqs[i], dw_spi_irq,
IRQF_SHARED, dev_name(dev), host);
if (ret < 0 && ret != -ENOTCONN) {
dev_err(dev, "can not get IRQ\n");
goto err_free_host;
}
}
}

dw_spi_init_mem_ops(dws);

Expand Down
19 changes: 19 additions & 0 deletions drivers/spi/spi-dw-mmio.c
Original file line number Diff line number Diff line change
Expand Up @@ -269,6 +269,24 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev,
return 0;
}

static int dw_spi_canaan_k230_init(struct platform_device *pdev,
struct dw_spi_mmio *dwsmmio)
{
int i, irq;

memset(dwsmmio->dws.irqs, 0, sizeof(dwsmmio->dws.irqs));
dwsmmio->dws.ip = DW_HSSI_ID;
dwsmmio->dws.caps = DW_SPI_CAP_INDEP_IRQ;
for (i = 1; i < ARRAY_SIZE(dwsmmio->dws.irqs); i++) {
irq = platform_get_irq(pdev, i);
if (irq < 0)
return 0;
dwsmmio->dws.irqs[i - 1] = irq;
}

return 0;
}

static void dw_spi_elba_override_cs(struct regmap *syscon, int cs, int enable)
{
regmap_update_bits(syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs),
Expand Down Expand Up @@ -431,6 +449,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
},
{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
{ .compatible = "canaan,k230-spi", dw_spi_canaan_k230_init},
{ .compatible = "amd,pensando-elba-spi", .data = dw_spi_elba_init},
{ /* end of table */}
};
Expand Down
2 changes: 2 additions & 0 deletions drivers/spi/spi-dw.h
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@
/* DW SPI controller capabilities */
#define DW_SPI_CAP_CS_OVERRIDE BIT(0)
#define DW_SPI_CAP_DFS32 BIT(1)
#define DW_SPI_CAP_INDEP_IRQ BIT(2)

/* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
#define DW_SPI_CTRLR0 0x00
Expand Down Expand Up @@ -158,6 +159,7 @@ struct dw_spi {
void __iomem *regs;
unsigned long paddr;
int irq;
int irqs[16];
u32 fifo_len; /* depth of the FIFO buffer */
unsigned int dfs_offset; /* CTRLR0 DFS field offset */
u32 max_mem_freq; /* max mem-ops bus freq */
Expand Down
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