arm64: dts: qcom: sdm636-xiaomi-tulip: enable fan53526 buck regulator for LDDR4 #45
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Since Android primary bootloader with system-as-root feature [1] enabled adds some arguments to kernel command line from boot.img, that make booting Linux harder: * skip_initramfs * root=/dev/dm-0 * init=/init * dm=... Most importantly, Linux processes root= parameter and at boot time skips initramfs and tries to mount root device that does not exist and fails. Add a quick hack to scramble these parameters from cmdline passed by primary bootloader in FDT /chosen/bootargs property, so that Linux won't accidentally process them. [1] https://source.android.com/docs/core/architecture/partitions/system-as-root Signed-off-by: Alexey Minnekhanov <[email protected]>
Generated with: $ make savedefconfig && cp defconfig ../arch/arm64/configs/sdm660_defconfig barni2000: Add CONFIG_DRM_PANEL_BOE_TD4320 as a module. Signed-off-by: Alexey Minnekhanov <[email protected]> Signed-off-by: Barnabás Czémán <[email protected]>
Similarly to MSM8998, add and use modem metadata memory region. This fixes dtbs check warning; but however does not seemingly affect device functionality. Signed-off-by: Alexey Minnekhanov <[email protected]>
Describe Wi-Fi device node used in SDM630/660. Signed-off-by: Alexey Minnekhanov <[email protected]>
Similarly to MSM8996 DragonBoard 820c, MSM8998 and SDM630 are equipped with Adreno 5xx series, which doesn't have separate pagetables support at the moment of writing. Skip the TTBR1 quirk for these two SoCs as to get Adreno in a usable state.
Add MSM8998 and SDM660's mss-pil compatibles to switch the default iommu domain type to IDENTITY, as similarly required by SDM845 and others. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> (JAMI: fixup for 6.0-rc2)
It cannot be taken for granted that the last IOMMU context is free and available for us to use it to emulate bypass streams and, at least on MSM8998's lpass iommu, using the last one will produce a crash; please note that this may not be only dependant on the SoC, but also on the firmware version. To overcome to this issue, allow specifying a different context for bypass emulation with the optional DT property "qcom,bypass-cbndx": if this property is not found this means that we are either booting with ACPI instead or that we don't want to specify a custom cb because the default one (the last context bank) is fine. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> (JAMI: fixup for v6.0-rc1)
On some SoCs some IOMMU context banks are actively used from TZ during system boot, or some hypervisor configurations will trigger a system reset upon disabling some protected/secured CBs. Allow skipping the disablement of such contexts at IOMMU reset time during initialization with a new implementation detail to work around this quirk. Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Some Qualcomm SoCs' TZ/hypervisor configuration is disallowing the disablement of some context banks, being them used for tzapps and/or remote processors; any attempt to disable such CBs will result in triggering a fault and the system will freeze and/or reset. For this reason, get a list of context banks that should never get disabled during smmu initialization through a DT array property `qcom,reset-nodisable-cbs`. It was chosen to not hardcode the CBs as this is dependant on the SoC's firmware, which may vary on different boards. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> (JAMI: fixup for v6.0-rc1)
Avoid modifying the contents of the secure Auxiliary Control Register on some Qualcomm SoCs: due to a hypervisor configuration on some firmware versions, this would result in a system crash. Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
On the LPASS and ANOC2 IOMMUs, we cannot use the last context to emulate bypass streams: set the right context banks to avoid crashes.
Some IOMMU context banks are secured and any attempt to disable them during arm-smmu initialization will result in a system crash. To work around this issue, add a list of context banks that will never be disabled, but only reconfigured, at initialization time. Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Add binding for the Novatek NT36xxx series touchscreen driver. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Rob Herring <[email protected]>
This is a driver for the Novatek in-cell touch controller and supports various chips from the NT36xxx family, currently including NT36525, NT36672A, NT36676F, NT36772 and NT36870. Functionality like wake gestures and firmware flashing is not included: I am not aware of any of these DrIC+Touch combo chips not including a non-volatile memory and it should be highly unlikely to find one, since the touch firmware is embedded into the DriverIC one, which is obviously necessary to drive the display unit. However, the necessary address for the firmware update procedure was included into the address table in this driver so, in the event that someone finds the need to implement it for a reason or another, it will be pretty straightforward to. This driver is lightly based on the downstream implementation [1]. [1] https://github.com/Rasenkai/caf-tsoft-Novatek-nt36xxx Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Ths driver supports the fuel gauge hardware available on PMICs such as PMI8994, as well as gen 3 fuel gauge hardware available on PMI8998. Co-developed-by: Caleb Connolly <[email protected]> Co-developed-by: Yassine Oudjana <[email protected]> Signed-off-by: Yassine Oudjana <[email protected]> qcom_fg: expose PROP_STATUS to fix upower not detecting charging status properly fg: adopt battery info API changes power: qcom_fg: silence -EPROBE_DEFER error Sometimes, the devm_power_supply_register function will return ERR_PTR(-EPROBE_DEFER) to make the driver subsystem probe the fuel guage later. This is not an error and do not report it as such. Signed-off-by: Richard Acayan <[email protected]> power/supply: qcom_fg: add present sysfs property Present property is required for battery drivers from UPower>=1.90.0 onwards to work properly. Signed-off-by: Alexander Martinz <[email protected]> Link: https://gitlab.com/sdm845-mainline/linux/-/commit/b5f9aa03a205d74b7b4e2470cb92c258040849d5
Add bindings for qcom PMIC SPMI haptics driver. Signed-off-by: Caleb Connolly <[email protected]>
Add support for the haptics found in pmi8998 and related PMICs. Based on the ff-memless interface. Currently this driver provides a partial implementation of hardware features. This driver only supports LRAs (Linear Resonant Actuators) in the "buffer" mode with a single wave pattern. Signed-off-by: Caleb Connolly <[email protected]>
Signed-off-by: Gianluca Boiano <[email protected]>
PM660 has a fuel guage gen 3, which is compatible with the one used in MSM8998. Signed-off-by: Aboothahir U <[email protected]>
Signed-off-by: Marijn Suijten <[email protected]> Signed-off-by: Aboothahir U <[email protected]>
Adreno 508/509/512 MODULE_FIRMWARE was missing in a5xx_catalog. Signed-off-by: Aboothahir U <[email protected]>
Add zap-shader node for adreno_gpu to be able to load zap shader firmware, which is required for working GPU. According to drivers/gpu/drm/msm/adreno/adreno_device.c, Adreno 508 (found in SDM630) uses it's own a508_zap, Adreno 509 (found in SDM636) uses same a512_zap as Adreno 512. Signed-off-by: Barnabás Czémán <[email protected]>
Add SDM630/660's MDP5 compatibles to switch the default iommu domain type to IDENTITY, as similarly required by SDM845 and others. Signed-off-by: Alexey Minnekhanov <[email protected]>
Signed-off-by: Aboothahir U <[email protected]>
Initial support for Asus Zenfone Max Pro M1 (SDM636)
* Currently works
-Simple-framebuffer
-eMMC,SDCard
-Power Button
-Volume-keys
-Wifi(Partial)
-Bluetooth
-Touchscreen-NT36XXX
-Display
-GPU(Partial)
-USB
Signed-off-by: Aboothahir U <[email protected]>
arm64: dts: qcom: asus-x00td: Add support for battery
Enable fuelgauge, charger and round-robin ADC nodes required
for fully functional battery support.
Describe simple-battery node.
Signed-off-by: Aboothahir U <[email protected]>
Add support for the SDM660 Xiaomi Platina (Mi 8 Lite). Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
* Add simple framebuffer display node and reserve memory for it. * Enable qusb2phy0 and its vdd supplies * Disable gpucc and mmcc, simplefb stops working after few seconds when these are enabled. * Add node for touchscreen * Fix volume keys Signed-off-by: Molly Sophia <[email protected]>
Enable support for modem remote processor, WCN3990 Wi-Fi and bluetooth on Xiaomi Redmi Note 7 (lavender). Durig probe chip is identified as: qmi chip_id 0x140 chip_family 0x4002 board_id 0xff soc_id 0x40050000 Signed-off-by: Alexey Minnekhanov <[email protected]>
The Xiaomi Redmi Note 7 uses a Novatek NT36672A touchscreen, so add support for it. Signed-off-by: Dang Huynh <[email protected]> [alexey: added power supply and pinctrl] Signed-off-by: Alexey Minnekhanov <[email protected]>
Add panel-simple used in xiaomi-lavender phone. Signed-off-by: Alexey Minnekhanov <[email protected]>
…e 6 Pro Add panel-simple used in xiaomi-tulip phone. Signed-off-by: Gianluca Boiano <[email protected]>
Add driver for BOE TD4320 DSI panel, used in Xiaomi Redmi Note 7 mobile phone. Signed-off-by: Barnabás Czémán <[email protected]>
Enable display susystem, Adreno GPU and all required nodes, such as iommus, gpucc and DSI PHY. Add panel node. Relocate zap-shader memory region to avoid CPU stalls. Signed-off-by: Alexey Minnekhanov <[email protected]>
Add compatibles for Xiaomi Redmi Note 7 (lavender) variants. Signed-off-by: Barnabás Czémán <[email protected]>
Xiaomi Redmi Note 7 (lavender) has two variant one with tianma display with novatek touchscreen and one with boe display with synpatics touchscreen. These changes split lavender devicetree by display. Signed-off-by: Barnabás Czémán <[email protected]>
…ia XA2) Add driver for 1080x1920 DSI panel used in Sony Xperia XA2 phone. Signed-off-by: Bhushan Shah <[email protected]>
Signed-off-by: Bhushan Shah <[email protected]>
Fine grain preemption (switching from/to points within submits) requires extra handling in command stream of those submits, especially when rendering with tiling (using GMEM). However this handling is missing at this point in mesa (and always was). For this reason we get random GPU faults and hangs if more than one priority level is used because local preemption is enabled prior to executing command stream from submit. With that said it was ahead of time to enable local preemption by default considering the fact that even on downstream kernel it is only enabled if requested via UAPI. Fixes: a7a4c19 ("drm/msm/a5xx: fix setting of the CP_PREEMPT_ENABLE_LOCAL register") Signed-off-by: Vladimir Lypak <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/612041/ Signed-off-by: Rob Clark <[email protected]>
Two fields of preempt_record which are used by CP aren't reset on resume: "data" and "info". This is the reason behind faults which happen when we try to switch to the ring that was active last before suspend. In addition those faults can't be recovered from because we use suspend and resume to do so (keeping values of those fields again). Fixes: b1fc283 ("drm/msm: Implement preemption for A5XX targets") Signed-off-by: Vladimir Lypak <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/612043/ Signed-off-by: Rob Clark <[email protected]>
On A5XX GPUs when preemption is used it's invietable to enter a soft lock-up state in which GPU is stuck at empty ring-buffer doing nothing. This appears as full UI lockup and not detected as GPU hang (because it's not). This happens due to not triggering preemption when it was needed. Sometimes this state can be recovered by some new submit but generally it won't happen because applications are waiting for old submits to retire. One of the reasons why this happens is a race between a5xx_submit and a5xx_preempt_trigger called from IRQ during submit retire. Former thread updates ring->cur of previously empty and not current ring right after latter checks it for emptiness. Then both threads can just exit because for first one preempt_state wasn't NONE yet and for second one all rings appeared to be empty. To prevent such situations from happening we need to establish guarantee for preempt_trigger to make decision after each submit or retire. To implement this we serialize preemption initiation using spinlock. If switch is already in progress we need to re-trigger preemption when it finishes. Fixes: b1fc283 ("drm/msm: Implement preemption for A5XX targets") Signed-off-by: Vladimir Lypak <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/612045/ Signed-off-by: Rob Clark <[email protected]>
There is another cause for soft lock-up of GPU in empty ring-buffer: race between GPU executing last commands and CPU checking ring for emptiness. On GPU side IRQ for retire is triggered by CACHE_FLUSH_TS event and RPTR shadow (which is used to check ring emptiness) is updated a bit later from CP_CONTEXT_SWITCH_YIELD. Thus if GPU is executing its last commands slow enough or we check that ring too fast we will miss a chance to trigger switch to lower priority ring because current ring isn't empty just yet. This can escalate to lock-up situation described in previous patch. To work-around this issue we keep track of last submit sequence number for each ring and compare it with one written to memptrs from GPU during execution of CACHE_FLUSH_TS event. Fixes: b1fc283 ("drm/msm: Implement preemption for A5XX targets") Signed-off-by: Vladimir Lypak <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/612047/ Signed-off-by: Rob Clark <[email protected]>
… not set Many qcom clock drivers do not have .width set. In that case value of (p)->width - 1 will be negative which breaks clock tree. Fix this by checking if width is zero, and pass 3 to GENMASK if that's the case. Fixes: 1c35411 ("clk: qcom: support for 2 bit PLL post divider") Fixes: 2c4553e ("clk: qcom: clk-alpha-pll: Fix the pll post div mask") Signed-off-by: Barnabás Czémán <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]>
The WCN3990 might split MSDUs among multiple "in-order" indications. The driver needs information from previous indications to handle MPDUs that are not started by the same indications that complete them. Move the list that tracks unprocessed MSDUs to the driver state so the driver can handle MPDUs that are split in this way and be less confused. Fixes: c545070 ("ath10k: implement rx reorder support") Signed-off-by: Richard Acayan <[email protected]>
This clock can't be enable with VENUS_CORE0 GDSC turned off. But that GDSC is under HW control so it can be turned off at any moment. Instead of checking the dependant clock we can just vote for it to enable later when GDSC gets turned on. Signed-off-by: Barnabás Czémán <[email protected]>
Add fake panel node for simple-framebuffer to calculate DPI from. It only needs width & height specified. We can't just reference "real" panel node which is under mdss/mdp/dsi, because it will cause simplefb to probe second, after mdss and it will cause multiple issues. This fake node allows us to break device link from simplefb to mdss (implicitly via panel->mdp->mdss) to fix drm device probe ordering. Without this, simpledrm would probe second after msm-drm, and confuse userspace with 2 GPUs in /dev/dri. Alternative workaround is to boot with kernel parameter `fw_devlink=permissive`, which allows simpledrm to probe first, but it is worse, because it can hide other issues with device dependencies.
This change add spi7 interface to SDM630 devices. Signed-off-by: Gianluca Boiano <[email protected]>
It enables SPI interface on tulip Signed-off-by: Gianluca Boiano <[email protected]>
Signed-off-by: Gianluca Boiano <[email protected]>
This specific version is used on sdm660 SoC family Signed-off-by: Gianluca Boiano <[email protected]>
minlexx
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Nov 9, 2024
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Also I thought, this is the power to DDR - https://elixir.bootlin.com/linux/v6.11.7/source/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi#L541 /* This gives power to the LPDDR4: never turn it off! */
vreg_l13a_1p8: l13 {or maybe it can be device specific 🤔 |
… for LDDR4 Signed-off-by: Gianluca Boiano <[email protected]>
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From what I've found this regulator is in lavender, clover and tulip schematics.
dmesg:
i2c-detect: