compas-ft-riscv

COMPAS: Compiler-assisted Software-implemented Hardware Fault Tolerance implemented in LLVM passes for the RISC-V backend

Repo to house SIHFT passes for LLVM to create COMPAS, a compiler that adds fault tolerance on instruction level for RISCV 32/64 targets. COMPAS is implemented such that it can be used as patch for the RISC-V LLVM toolchain.

Citation

If you want to cite this work, please use the following paper.

U Sharif, D Mueller-Gritschneder, U Schlichtmann: COMPAS: Compiler-assisted Software-implemented Hardware Fault Tolerance for RISC-V, 11th Mediterranean Conference on Embedded Computing (MECO), 2022

@INPROCEEDINGS{9797144, author={Sharif, Uzair and Mueller-Gritschneder, Daniel and Schlichtmann, Ulf}, booktitle={2022 11th Mediterranean Conference on Embedded Computing (MECO)}, title={COMPAS: Compiler-assisted Software-implemented Hardware Fault Tolerance for RISC-V}, year={2022}, volume={}, number={}, pages={1-4}, doi={10.1109/MECO55406.2022.9797144}}

User Guide

Detailed instructions on compiler installation and usage can be found in doc/manual. We provide the manual as pdf.

The manual provides details on how to install LLVM compiler with our SIHFT passes. Further, the manual provides usage instructions on how to harden a given C/C++ project using SIHFT transformations.

Licensing and Copyright

See the separate LICENSE file to determine your rights and responsibilities for using these code modules

Version History

Version 1.0

The supported SIHFT passes are:

Data flow protection:

• EDDI
• SWIFT
• NZDC
• NEMESIS
• REPAIR

Control flow protection:

• CFCSS
• RASM

Literature

EDDI: https://ieeexplore.ieee.org/document/994913
SWIFT: https://ieeexplore.ieee.org/document/1402092
NZDC: https://ieeexplore.ieee.org/document/7544291
NEMESIS: https://ieeexplore.ieee.org/document/8203792

CFCSS: https://ieeexplore.ieee.org/document/994926
RASM: https://ieeexplore.ieee.org/document/8067656

REPAIR: https://dl.acm.org/doi/abs/10.1145/3477001