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ci: fix
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PhilippvK committed Nov 9, 2024
1 parent 5e64aa3 commit e5745a4
Showing 1 changed file with 4 additions and 1 deletion.
5 changes: 4 additions & 1 deletion .github/workflows/etiss_riscv_examples.yml
Original file line number Diff line number Diff line change
Expand Up @@ -61,7 +61,10 @@ jobs:
run: |
cd ..
wget https://syncandshare.lrz.de/dl/fi2p5Ds5PHktjmZGKzR9tx/GCC/default/2024.09.03/Ubuntu/22.04/rv32im_zicsr_zifencei_ilp32.tar.xz
tar xvf rv32im_zicsr_zifencei_ilp32.tar.xz
mkdir gnu
cd gnu
tar xvf ../rv32im_zicsr_zifencei_ilp32.tar.xz
cd ..
rm rv32im_zicsr_zifencei_ilp32.tar.xz
- name: Build ETISS RISCV Examples for Testing
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