Move CPUs to a higher directory

src/bin/disasm/main.rs

@@ -3,7 +3,7 @@ use std::fs;
 
 use anyhow::{bail, Result};
 
-use siena::snes::cpu_65816::instruction::Instruction;
+use siena::cpu_65816::instruction::Instruction;
 
 fn main() -> Result<()> {
     let args: Vec<String> = env::args().collect();

src/bin/siena/main.rs

@@ -11,14 +11,14 @@ use sdl2::keyboard::Keycode;
 use serde::Deserialize;
 use serde_json::Deserializer;
 
+use siena::bus::Bus;
+use siena::cpu_65816::cpu::Cpu65816;
 use siena::frontend::channel::ChannelRenderer;
 use siena::frontend::gif::Gif;
 use siena::frontend::sdl::{SDLAudioSink, SDLEventPump, SDLRenderer};
 use siena::frontend::Renderer;
 use siena::snes::bus::mainbus::{BusTrace, Mainbus};
-use siena::snes::bus::Bus;
 use siena::snes::cartridge::{Cartridge, VideoFormat};
-use siena::snes::cpu_65816::cpu::Cpu65816;
 use siena::snes::joypad::{Button, Joypad, JoypadEvent};
 use siena::snes::ppu::ppu::{SCREEN_HEIGHT, SCREEN_WIDTH};
 

src/bin/spcdisasm/main.rs

@@ -3,7 +3,7 @@ use std::fs;
 
 use anyhow::{bail, Result};
 
-use siena::snes::cpu_spc700::instruction::Instruction;
+use siena::cpu_spc700::instruction::Instruction;
 
 fn main() -> Result<()> {
     let args: Vec<String> = env::args().collect();

src/bin/upddisasm/main.rs

@@ -3,7 +3,7 @@ use std::fs;
 
 use anyhow::{bail, Result};
 
-use siena::snes::cpu_upd77c25::instruction::Instruction;
+use siena::cpu_upd77c25::instruction::Instruction;
 
 fn main() -> Result<()> {
     let args: Vec<String> = env::args().collect();

src/bus/mod.rs

@@ -0,0 +1,140 @@
+pub mod testbus;
+
+use crate::tickable::Tickable;
+
+use num_traits::{PrimInt, WrappingAdd};
+
+/// Main CPU address data type (actually 24-bit)
+pub type Address = u32;
+
+/// Main CPU address mask
+pub const ADDRESS_MASK: Address = 0x00FFFFFF;
+
+/// Main CPU total address space
+pub const ADDRESS_SPACE_SIZE: usize = 16 * 1024 * 1024;
+pub const ADDRESS_SPACE: u32 = 16 * 1024 * 1024;
+
+pub trait BusMember<T: PrimInt> {
+    fn read(&self, addr: T) -> Option<u8>;
+    fn write(&mut self, addr: T, val: u8) -> Option<()>;
+}
+
+pub trait Bus<T: PrimInt + WrappingAdd>: Tickable {
+    fn read(&self, addr: T) -> u8;
+    fn write(&mut self, addr: T, val: u8);
+    fn get_clr_nmi(&mut self) -> bool;
+    fn get_clr_int(&mut self) -> bool;
+
+    // TODO this is pretty awful
+    fn get_mask(&self) -> T;
+
+    /// Write 16-bits to addr + 1 and addr (specific access order),
+    /// in little endian.
+    fn write16(&mut self, addr: T, val: u16) {
+        self.write(addr.wrapping_add(&T::one()), (val >> 8) as u8);
+        self.write(addr, val as u8);
+    }
+
+    /// Write 16-bits to addr and addr + 1 (specific access order),
+    /// in little endian.
+    /// This access order is inverted, for operations that
+    /// require that..
+    fn write16_acc_low(&mut self, addr: T, val: u16) {
+        self.write(addr, val as u8);
+        self.write(addr.wrapping_add(&T::one()), (val >> 8) as u8);
+    }
+
+    /// Read 16-bits from addr and addr + 1,
+    /// from little endian.
+    fn read16(&self, addr: T) -> u16 {
+        let l = self.read(addr);
+        let h = self.read(addr.wrapping_add(&T::one()));
+        l as u16 | (h as u16) << 8
+    }
+}
+
+impl<T> core::fmt::Debug for dyn Bus<T> {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        write!(f, "Bus")
+    }
+}
+
+pub struct BusIterator<'a, T: PrimInt + WrappingAdd> {
+    bus: &'a dyn Bus<T>,
+    next: T,
+}
+
+impl<'a, T: PrimInt + WrappingAdd> BusIterator<'a, T> {
+    pub fn new_from(bus: &'a dyn Bus<T>, offset: T) -> Self {
+        Self { bus, next: offset }
+    }
+
+    pub fn new(bus: &'a dyn Bus<T>) -> Self {
+        Self::new_from(bus, T::zero())
+    }
+}
+
+impl<'a, T: PrimInt + WrappingAdd> Iterator for BusIterator<'a, T> {
+    type Item = u8;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        let curr = self.next;
+        self.next = self.next.wrapping_add(&T::one()) & self.bus.get_mask();
+
+        Some(self.bus.read(curr))
+    }
+}
+
+#[cfg(test)]
+mod tests {
+    use super::testbus::Testbus;
+    use super::*;
+
+    fn testbus() -> Testbus<Address> {
+        let mut b = Testbus::<Address>::new(ADDRESS_MASK);
+        for a in 0..ADDRESS_SPACE {
+            b.write(a, a as u8);
+        }
+        b
+    }
+
+    #[test]
+    fn busiterator_new() {
+        let b = testbus();
+        let mut i = BusIterator::new(&b);
+
+        for a in 0..=ADDRESS_MASK {
+            assert_eq!(i.next(), Some(a as u8));
+        }
+        // Should wrap around at the end
+        assert_eq!(i.next(), Some(0));
+    }
+
+    #[test]
+    fn busiterator_new_from() {
+        let b = testbus();
+        let mut i = BusIterator::new_from(&b, 5);
+
+        for a in 5..=ADDRESS_MASK {
+            assert_eq!(i.next(), Some(a as u8));
+        }
+        // Should wrap around at the end
+        assert_eq!(i.next(), Some(0));
+    }
+
+    #[test]
+    fn bus_write16() {
+        let mut b = testbus();
+        b.write16(0x1000, 0x55AA);
+        assert_eq!(b.read(0x1000), 0xAA);
+        assert_eq!(b.read(0x1001), 0x55);
+    }
+
+    #[test]
+    fn bus_read16() {
+        let mut b = testbus();
+        b.write(0x1000, 0xAA);
+        b.write(0x1001, 0x55);
+        assert_eq!(b.read16(0x1000), 0x55AA);
+    }
+}

src/snes/cpu_65816/cpu.rs → src/cpu_65816/cpu.rs

@@ -4,7 +4,7 @@ use lrumap::LruBTreeMap;
 use num_traits::ToPrimitive;
 use serde::{Deserialize, Serialize};
 
-use crate::snes::bus::{Address, Bus, BusIterator, ADDRESS_MASK};
+use crate::bus::{Address, Bus, BusIterator, ADDRESS_MASK};
 use crate::tickable::Ticks;
 
 use super::alu;

src/snes/cpu_spc700/cpu.rs → src/cpu_spc700/cpu.rs

@@ -2,7 +2,7 @@ use anyhow::Result;
 use arrayvec::ArrayVec;
 use serde::{Deserialize, Serialize};
 
-use crate::snes::bus::{Bus, BusIterator};
+use crate::bus::{Bus, BusIterator};
 use crate::tickable::Ticks;
 
 use super::instruction::{Instruction, InstructionType, Operand, MAX_INSTRUCTION_LEN};

src/lib.rs

@@ -1,3 +1,7 @@
+pub mod bus;
+pub mod cpu_65816;
+pub mod cpu_spc700;
+pub mod cpu_upd77c25;
 pub mod frontend;
 pub mod snes;
 pub mod tickable;

src/snes/apu/apu.rs

@@ -4,9 +4,9 @@ use anyhow::Result;
 use colored::*;
 use serde::{Deserialize, Serialize};
 
-use crate::snes::bus::{Address, BusMember};
-use crate::snes::cpu_spc700::cpu::{CpuSpc700, SpcAddress};
-use crate::snes::cpu_spc700::regs::Register;
+use crate::bus::{Address, BusMember};
+use crate::cpu_spc700::cpu::{CpuSpc700, SpcAddress};
+use crate::cpu_spc700::regs::Register;
 use crate::tickable::{Tickable, Ticks};
 
 use super::apubus::Apubus;

src/snes/apu/apubus.rs

@@ -3,8 +3,8 @@ use colored::*;
 use serbia::serbia;
 use serde::{Deserialize, Serialize};
 
-use crate::snes::bus::Bus;
-use crate::snes::cpu_spc700::cpu::{SpcAddress, SPC_ADDRESS_MASK};
+use crate::bus::Bus;
+use crate::cpu_spc700::cpu::{SpcAddress, SPC_ADDRESS_MASK};
 use crate::tickable::{Tickable, Ticks};
 
 use super::apu::ApuPorts;

src/snes/bus/mainbus.rs

@@ -5,8 +5,8 @@ use anyhow::Result;
 use dbg_hex::dbg_hex;
 use serde::{Deserialize, Serialize};
 
+use crate::bus::{Address, Bus, BusMember, ADDRESS_MASK};
 use crate::frontend::Renderer;
-use crate::snes::bus::{Address, Bus, BusMember, ADDRESS_MASK};
 use crate::snes::cartridge::{Cartridge, VideoFormat};
 use crate::snes::joypad::{Joypad, JOYPAD_COUNT};
 use crate::snes::ppu::ppu::PPU;

src/snes/bus/mod.rs

@@ -1,141 +1 @@
 pub mod mainbus;
-pub mod testbus;
-
-use crate::tickable::Tickable;
-
-use num_traits::{PrimInt, WrappingAdd};
-
-/// Main CPU address data type (actually 24-bit)
-pub type Address = u32;
-
-/// Main CPU address mask
-pub const ADDRESS_MASK: Address = 0x00FFFFFF;
-
-/// Main CPU total address space
-pub const ADDRESS_SPACE_SIZE: usize = 16 * 1024 * 1024;
-pub const ADDRESS_SPACE: u32 = 16 * 1024 * 1024;
-
-pub trait BusMember<T: PrimInt> {
-    fn read(&self, addr: T) -> Option<u8>;
-    fn write(&mut self, addr: T, val: u8) -> Option<()>;
-}
-
-pub trait Bus<T: PrimInt + WrappingAdd>: Tickable {
-    fn read(&self, addr: T) -> u8;
-    fn write(&mut self, addr: T, val: u8);
-    fn get_clr_nmi(&mut self) -> bool;
-    fn get_clr_int(&mut self) -> bool;
-
-    // TODO this is pretty awful
-    fn get_mask(&self) -> T;
-
-    /// Write 16-bits to addr + 1 and addr (specific access order),
-    /// in little endian.
-    fn write16(&mut self, addr: T, val: u16) {
-        self.write(addr.wrapping_add(&T::one()), (val >> 8) as u8);
-        self.write(addr, val as u8);
-    }
-
-    /// Write 16-bits to addr and addr + 1 (specific access order),
-    /// in little endian.
-    /// This access order is inverted, for operations that
-    /// require that..
-    fn write16_acc_low(&mut self, addr: T, val: u16) {
-        self.write(addr, val as u8);
-        self.write(addr.wrapping_add(&T::one()), (val >> 8) as u8);
-    }
-
-    /// Read 16-bits from addr and addr + 1,
-    /// from little endian.
-    fn read16(&self, addr: T) -> u16 {
-        let l = self.read(addr);
-        let h = self.read(addr.wrapping_add(&T::one()));
-        l as u16 | (h as u16) << 8
-    }
-}
-
-impl<T> core::fmt::Debug for dyn Bus<T> {
-    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
-        write!(f, "Bus")
-    }
-}
-
-pub struct BusIterator<'a, T: PrimInt + WrappingAdd> {
-    bus: &'a dyn Bus<T>,
-    next: T,
-}
-
-impl<'a, T: PrimInt + WrappingAdd> BusIterator<'a, T> {
-    pub fn new_from(bus: &'a dyn Bus<T>, offset: T) -> Self {
-        Self { bus, next: offset }
-    }
-
-    pub fn new(bus: &'a dyn Bus<T>) -> Self {
-        Self::new_from(bus, T::zero())
-    }
-}
-
-impl<'a, T: PrimInt + WrappingAdd> Iterator for BusIterator<'a, T> {
-    type Item = u8;
-
-    fn next(&mut self) -> Option<Self::Item> {
-        let curr = self.next;
-        self.next = self.next.wrapping_add(&T::one()) & self.bus.get_mask();
-
-        Some(self.bus.read(curr))
-    }
-}
-
-#[cfg(test)]
-mod tests {
-    use super::testbus::Testbus;
-    use super::*;
-
-    fn testbus() -> Testbus<Address> {
-        let mut b = Testbus::<Address>::new(ADDRESS_MASK);
-        for a in 0..ADDRESS_SPACE {
-            b.write(a, a as u8);
-        }
-        b
-    }
-
-    #[test]
-    fn busiterator_new() {
-        let b = testbus();
-        let mut i = BusIterator::new(&b);
-
-        for a in 0..=ADDRESS_MASK {
-            assert_eq!(i.next(), Some(a as u8));
-        }
-        // Should wrap around at the end
-        assert_eq!(i.next(), Some(0));
-    }
-
-    #[test]
-    fn busiterator_new_from() {
-        let b = testbus();
-        let mut i = BusIterator::new_from(&b, 5);
-
-        for a in 5..=ADDRESS_MASK {
-            assert_eq!(i.next(), Some(a as u8));
-        }
-        // Should wrap around at the end
-        assert_eq!(i.next(), Some(0));
-    }
-
-    #[test]
-    fn bus_write16() {
-        let mut b = testbus();
-        b.write16(0x1000, 0x55AA);
-        assert_eq!(b.read(0x1000), 0xAA);
-        assert_eq!(b.read(0x1001), 0x55);
-    }
-
-    #[test]
-    fn bus_read16() {
-        let mut b = testbus();
-        b.write(0x1000, 0xAA);
-        b.write(0x1001, 0x55);
-        assert_eq!(b.read16(0x1000), 0x55AA);
-    }
-}

src/snes/cartridge.rs

@@ -6,8 +6,9 @@ use num_traits::FromPrimitive;
 use serde::{Deserialize, Serialize};
 use strum::Display;
 
-use super::bus::{Address, BusMember};
 use super::coprocessor::dsp1::DSP1;
+
+use crate::bus::{Address, BusMember};
 use crate::tickable::{Tickable, Ticks};
 
 const HDR_TITLE_OFFSET: usize = 0x00;