GSU: clear B/SREG/DREG/ALTx after MOVE(S)

twvd · Feb 26, 2024 · 59eac7d · 59eac7d
1 parent ec564fc
commit 59eac7d
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Showing 2 changed files with 25 additions and 2 deletions.
diff --git a/src/cpu_gsu/cpu.rs b/src/cpu_gsu/cpu.rs
@@ -209,11 +209,14 @@ impl CpuGsu {
 
         // SREG/DREG/ALTx are reset after execution, but should persist
         // for branch and prefix instructions.
-        if !(0x05..=0x0F).contains(&instr)
+        // Special cases for MOVE/MOVES because they use the same opcode
+        // as TO/FROM.
+        if (!(0x05..=0x0F).contains(&instr)
             && !(0x3D..=0x3F).contains(&instr)
             && (instr & 0xF0) != 0x10
             && (instr & 0xF0) != 0x20
-            && (instr & 0xF0) != 0xB0
+            && (instr & 0xF0) != 0xB0)
+            || (self.regs.test_flag(Flag::B) && ((instr & 0xF0 == 0x10) || (instr & 0xF0 == 0xB0)))
         {
             self.sreg = 0;
             self.dreg = 0;

diff --git a/src/cpu_gsu/test.rs b/src/cpu_gsu/test.rs
@@ -120,4 +120,24 @@ fn op_move() {
     let c = cpu_run(&[IWT | 2, 0xBB, 0xAA, WITH | 2, TO | 3, STOP]);
     assert_eq!(c.regs.read(Register::R2), 0xAABB);
     assert_eq!(c.regs.read(Register::R3), 0xAABB);
+    assert!(!c.regs.test_flag(Flag::B));
+}
+
+#[test]
+fn op_move_clears_altx_b() {
+    let mut c = cpu_steps(&[IWT | 2, 0xBB, 0xAA, WITH | 2, ALT3, TO | 3], 3);
+    // Before TO R2 (MOVE)
+    assert!(c.regs.test_flag(Flag::B));
+    assert!(c.regs.test_flag(Flag::ALT1));
+    assert!(c.regs.test_flag(Flag::ALT2));
+    assert_eq!(c.regs.read(Register::R3), 0);
+
+    c.step().unwrap();
+
+    // After MOVE
+    assert_eq!(c.regs.read(Register::R2), 0xAABB);
+    assert_eq!(c.regs.read(Register::R3), 0xAABB);
+    assert!(!c.regs.test_flag(Flag::B));
+    assert!(!c.regs.test_flag(Flag::ALT1));
+    assert!(!c.regs.test_flag(Flag::ALT2));
 }